Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach

2015 Sixth International Green and Sustainable Computing Conference (IGSC) ◽

10.1109/igcc.2015.7393714 ◽

2015 ◽

Author(s):

Salman Onsori ◽

Arghavan Asad ◽

Ozcan Ozturk ◽

Mahmood Fathy

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Memory Architecture ◽

Embedded Chip ◽

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Notice of Violation of IEEE Publication Principles: An Energy-Efficient Heterogeneous Memory Architecture for Future Dark Silicon Embedded Chip-Multiprocessors

IEEE Transactions on Emerging Topics in Computing ◽

10.1109/tetc.2016.2563323 ◽

2019 ◽

pp. 1-1 ◽

Author(s):

Salman Onsori ◽

Arghavan Asad ◽

Kaamran Raahemifar ◽

Mahmood Fathy

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Memory Architecture ◽

Dark Silicon ◽

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NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines

2018 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2018.8351128 ◽

2018 ◽

Author(s):

Pooneh Safayenikoo ◽

Arghavan Asad ◽

Mahmood Fathy ◽

Farah Mohammadi

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Architecture

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An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth

HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture ◽

10.1109/hpca.2010.5416628 ◽

2010 ◽

Author(s):

Dong Hyuk Woo ◽

Nak Hee Seong ◽

Dean L. Lewis ◽

Hsien-Hsin S. Lee

Keyword(s):

High Density ◽

Memory Architecture ◽

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Cross-architecture prediction based scheduling for energy efficient execution on single-ISA heterogeneous chip-multiprocessors

Microprocessors and Microsystems ◽

10.1016/j.micpro.2015.04.008 ◽

2015 ◽

Vol 39 (4-5) ◽

pp. 271-285 ◽

Author(s):

Ying Zhang ◽

Lide Duan ◽

Bin Li ◽

Lu Peng ◽

Srinivasan Sadagopan

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Efficient Execution

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A case for lifetime-aware task mapping in embedded chip multiprocessors

Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES/ISSS '10 ◽

10.1145/1878961.1878987 ◽

2010 ◽

Author(s):

Adam S. Hartman ◽

Donald E. Thomas ◽

Brett H. Meyer

Keyword(s):

Chip Multiprocessors ◽

Task Mapping ◽

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Design of an energy-efficient XNOR gate based on MTJ-based nonvolatile logic-in-memory architecture for binary neural network hardware

Japanese Journal of Applied Physics ◽

10.7567/1347-4065/aafb4d ◽

2019 ◽

Vol 58 (SB) ◽

pp. SBBB01 ◽

Author(s):

Masanori Natsui ◽

Tomoki Chiba ◽

Takahiro Hanyu

Keyword(s):

Neural Network ◽

Energy Efficient ◽

Memory Architecture ◽

Binary Neural Network ◽

Xnor Gate ◽

Neural Network Hardware

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Characterizing Vulnerability of Network Interfaces in Embedded Chip Multiprocessors

IEEE Embedded Systems Letters ◽

10.1109/les.2012.2193553 ◽

2012 ◽

Vol 4 (2) ◽

pp. 41-44 ◽

Author(s):

Yong Zou ◽

Yi Xiang ◽

S. Pasricha

Keyword(s):

Chip Multiprocessors ◽

Network Interfaces ◽

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Energy Efficient Memory Architecture for High Speed Decoding of Block Turbo-Codes with the Fang-Buda Algorithm

The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology ◽

10.1023/b:vlsi.0000047273.61038.18 ◽

2005 ◽

Vol 39 (1/2) ◽

pp. 79-92

Author(s):

B. Bougard ◽

M. Rullmann ◽

E. Brockmeyer ◽

L. van der Perre ◽

F. Catthoor ◽

...

Keyword(s):

Turbo Codes ◽

Energy Efficient ◽

Memory Architecture ◽

Efficient Memory ◽

Block Turbo Codes

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Using STT-RAM to enable energy-efficient near-threshold chip multiprocessors

Proceedings of the 23rd international conference on Parallel architectures and compilation - PACT '14 ◽

10.1145/2628071.2628132 ◽

2014 ◽

Author(s):

Xiang Pan ◽

Radu Teodorescu

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

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Write activity reduction on non-volatile main memories for embedded chip multiprocessors

ACM Transactions on Embedded Computing Systems ◽

10.1145/2442116.2442127 ◽

2013 ◽

Vol 12 (3) ◽

pp. 1-27 ◽

Author(s):

Jingtong Hu ◽

Chun Jason Xue ◽

Qingfeng Zhuge ◽

Wei-Che Tseng ◽

Edwin H.-M. Sha

Keyword(s):

Chip Multiprocessors ◽

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