An efficient data path synthesis algorithm for behavioral-level power optimization

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) ◽

10.1109/iscas.1999.777861 ◽

2003 ◽

Author(s):

Chaeryung Park ◽

Taewhan Park ◽

C.L. Liu

Keyword(s):

Power Optimization ◽

Data Path ◽

Synthesis Algorithm ◽

Behavioral Level ◽

Efficient Data ◽

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An Efficient Data-Path Synthesis Based on Algorithmic Description under the Constraints of Time and Area

Computer Hardware Description Languages and their Applications ◽

10.1016/b978-0-444-81641-2.50015-0 ◽

1993 ◽

pp. 131-138

Author(s):

Xing-Jian Xu ◽

Mitsuru Ishizuka

Keyword(s):

Data Path ◽

Efficient Data ◽

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A Fast Algorithm for Power Optimization Using Multiple Voltages in Data Path Synthesis

2005 6th International Conference on ASIC ◽

10.1109/icasic.2005.1611473 ◽

2006 ◽

Author(s):

Jianfeng Huang ◽

Jinian Bian ◽

Zhipeng Liu ◽

Yunfeng Wang

Keyword(s):

Fast Algorithm ◽

Power Optimization ◽

Data Path ◽

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An integrated approach to data path synthesis for power optimization

Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454) ◽

10.1109/asic.1999.806489 ◽

2003 ◽

Author(s):

Chaeryung Park ◽

Taewhan Kim ◽

C.L. Liu

Keyword(s):

Power Optimization ◽

Integrated Approach ◽

Data Path ◽

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Data routing: a paradigm for efficient data-path synthesis and code generation

Proceedings of 7th International Symposium on High-Level Synthesis ◽

10.1109/ishls.1994.302347 ◽

2002 ◽

Author(s):

D. Lanneer ◽

M. Cornero ◽

G. Goossens ◽

H. De Man

Keyword(s):

Code Generation ◽

Data Path ◽

Data Routing ◽

Efficient Data ◽

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An integrated data path synthesis algorithm based on network flow method

Proceedings of the IEEE 1995 Custom Integrated Circuits Conference ◽

10.1109/cicc.1995.518258 ◽

2002 ◽

Author(s):

Taewhan Kim ◽

C.L. Liu

Keyword(s):

Network Flow ◽

Data Path ◽

Synthesis Algorithm ◽

Flow Method ◽

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Power efficient data path synthesis of sum-of-products computations

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2003.812368 ◽

2003 ◽

Vol 11 (3) ◽

pp. 446-450 ◽

Author(s):

K. Masselos ◽

P. Merakos ◽

S. Theoharis ◽

T. Stouraitis ◽

C.E. Goutis

Keyword(s):

Data Path ◽

Power Efficient ◽

Sum Of Products ◽

Efficient Data ◽

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An evolutionary approach for data path synthesis

2000 Canadian Conference on Electrical and Computer Engineering. Conference Proceedings. Navigating to a New Era (Cat. No.00TH8492) ◽

10.1109/ccece.2000.849734 ◽

2002 ◽

Author(s):

H.M. Harmanani ◽

R. Saliba

Keyword(s):

Evolutionary Approach ◽

Data Path ◽

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High-level data path synthesis for built-in self-test designs

2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233) ◽

10.1109/pacrim.2001.953577 ◽

2002 ◽

Author(s):

Laurence Tainruo Yang ◽

J. Muzio

Keyword(s):

Data Path ◽

Self Test ◽

Built In Self Test ◽

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A model-based methodology for application specific energy efficient data path design using FPGAs

Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors ◽

10.1109/asap.2002.1030706 ◽

2003 ◽

Author(s):

S. Mohanty ◽

S. Choi ◽

Ju-wook Jang ◽

V.K. Prasanna

Keyword(s):

Specific Energy ◽

Energy Efficient ◽

Data Path ◽

Model Based ◽

Path Design ◽

Efficient Data ◽

Application Specific

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An approach for redesigning in data path synthesis

Proceedings of the 30th international on Design automation conference - DAC '93 ◽

10.1145/157485.164958 ◽

1993 ◽

Author(s):

Christos Papachristou ◽

Haidar Harmanani ◽

Mehrdad Nourani

Keyword(s):

Data Path ◽

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