Multi Clock Flooded LDPC Decoding Architecture with Reduced Memory and Interconnect

Author(s):  
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Ioana Mot
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2016 ◽  
Vol E99.C (2) ◽  
pp. 293-301 ◽  
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Jaehwan JUNG ◽  
In-Cheol PARK

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Vol 2 ◽  
pp. 278-290
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Matthew Tonnemacher ◽  
Hao Chen ◽  
Jianzhong Zhang ◽  
Joseph R. Cavallaro
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2021 ◽  
Author(s):  
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...  
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