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Cache Memory Architecture for Leakage Energy Reduction
Innovative architecture for future generation high-performance processors and systems (iwia 2007)
◽
10.1109/iwia.2007.12
◽
2007
◽
Cited By ~ 3
Author(s):
Kiyofumi Tanaka
Keyword(s):
Energy Reduction
◽
Cache Memory
◽
Memory Architecture
Download Full-text
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Cited By
References
Leakage energy reduction in cache memory by data compression
ACM SIGARCH Computer Architecture News
◽
10.1145/1360464.1360472
◽
2007
◽
Vol 35
(5)
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pp. 17-24
◽
Cited By ~ 4
Author(s):
Kiyofumi Tanaka
◽
Takahiro Kawahara
Keyword(s):
Data Compression
◽
Energy Reduction
◽
Cache Memory
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Cache Memory Architecture for Core Processor
10.1007/978-981-16-5207-3_66
◽
2021
◽
pp. 809-820
Author(s):
Reeya Agrawal
Keyword(s):
Cache Memory
◽
Memory Architecture
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Split Memory Based Memory Architecture with Single-ended High Speed Sensing Circuit to Improve Cache Memory Performance
2020 6th International Conference on Signal Processing and Communication (ICSC)
◽
10.1109/icsc48311.2020.9182771
◽
2020
◽
Author(s):
Kirmender Singh
◽
Sajal Khanna
Keyword(s):
High Speed
◽
Memory Performance
◽
Cache Memory
◽
Memory Architecture
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An Edge Cache Memory Architecture for Early Visual Processing VLSIs
10.7567/ssdm.2006.p-5-5
◽
2006
◽
Author(s):
Ovgu Ozturk
◽
Tadashi Shibata
Keyword(s):
Visual Processing
◽
Cache Memory
◽
Memory Architecture
◽
Early Visual Processing
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A Class Project For Low Power Cache Memory Architecture
10.18260/1-2--6
◽
2020
◽
Author(s):
Yul Chu
Keyword(s):
Low Power
◽
Cache Memory
◽
Memory Architecture
◽
Class Project
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A 16GHz Optical Cache Memory Architecture for Set-Associative Mapping in Chip Multiprocessors
Optical Fiber Communication Conference
◽
10.1364/ofc.2014.th2a.6
◽
2014
◽
Cited By ~ 3
Author(s):
P. Maniotis
◽
D. Fitsios
◽
G.T. Kanellos
◽
N. Pleros
Keyword(s):
Chip Multiprocessors
◽
Cache Memory
◽
Memory Architecture
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Analysis of MTCMOS Cache Memory Architecture for Processor
Proceedings of International Conference on Communication and Artificial Intelligence - Lecture Notes in Networks and Systems
◽
10.1007/978-981-33-6546-9_9
◽
2021
◽
pp. 81-91
Author(s):
Reeya Agrawal
◽
Vishal Goyal
Keyword(s):
Cache Memory
◽
Memory Architecture
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High Performance Data Cache Memory Architecture
Journal of the Korea Academia-Industrial cooperation Society
◽
10.5762/kais.2008.9.4.945
◽
2008
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Vol 9
(4)
◽
pp. 945-951
Author(s):
Hong-Sik Kim
◽
Cheong-Ghil Kim
Keyword(s):
High Performance
◽
Performance Data
◽
Cache Memory
◽
Data Cache
◽
Memory Architecture
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An energy efficient cache memory architecture for embedded systems
Proceedings of the 2004 ACM symposium on Applied computing - SAC '04
◽
10.1145/967900.968079
◽
2004
◽
Cited By ~ 3
Author(s):
Park Jung-Wook
◽
Kim Cheong-Ghil
◽
Lee Jung-Hoon
◽
Kim Shin-Dug
Keyword(s):
Embedded Systems
◽
Energy Efficient
◽
Cache Memory
◽
Memory Architecture
Download Full-text
PSP-Cache: A low-cost fault-tolerant cache memory architecture
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014
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10.7873/date2014.177
◽
2014
◽
Cited By ~ 1
Author(s):
Hamed Farbeh
◽
Seyed Ghassem Miremadi
Keyword(s):
Fault Tolerant
◽
Low Cost
◽
Cache Memory
◽
Memory Architecture
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