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Creating the IC palette (ASIC design)
[1990 Proceedings] The First International Workshop on Rapid System Prototying
◽
10.1109/iwrsp.1990.144037
◽
2002
◽
Cited By ~ 1
Author(s):
M. Royals
◽
T. Markas
◽
Tianmaw Yang
◽
N. Kanopoulos
Keyword(s):
Asic Design
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Cited By
References
From RTL to GDSII: An ASIC design course development using Synopsys® University Program
2011 IEEE International Conference on Microelectronic Systems Education
◽
10.1109/mse.2011.5937096
◽
2011
◽
Cited By ~ 10
Author(s):
Jianchao Lu
◽
Baris Taskin
Keyword(s):
Course Development
◽
Asic Design
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A loop-based built in self test strategy for ASIC design
[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications
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10.1109/cmpeur.1991.257452
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2002
◽
Author(s):
P.A. Findlay
◽
B.A. Johnson
Keyword(s):
Asic Design
◽
Test Strategy
◽
Self Test
◽
Built In Self Test
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Experience of behavioural modelling in the mixed-signal ASIC design process-a case study
Proceedings of the Fifth IEEE International Workshop on Behavioral Modeling and Simulation. BMAS 2001 (Cat No.01TH8601)
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10.1109/bmas.2001.962493
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2002
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Author(s):
P.R. Wilson
◽
P. Chapman
◽
J.N. Ross
◽
A.D. Brown
Keyword(s):
Design Process
◽
Mixed Signal
◽
Behavioural Modelling
◽
Asic Design
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Design and Analysis of 8-bit Smith Waterman based DNA Sequence Alignment Accelerator's Core on ASIC Design Flow
2010 Fourth UKSim European Symposium on Computer Modeling and Simulation
◽
10.1109/ems.2010.31
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2010
◽
Cited By ~ 2
Author(s):
A.K. Halim
◽
Z.A. Majid
◽
M.A. Mansor
◽
S.A.M. Al Junid
◽
S. Mohamed
◽
...
Keyword(s):
Dna Sequence
◽
Sequence Alignment
◽
Design Flow
◽
Asic Design
◽
Dna Sequence Alignment
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The CMOS gate forest: an efficient and flexible high-performance ASIC design environment
IEEE Journal of Solid-State Circuits
◽
10.1109/4.999
◽
1988
◽
Vol 23
(2)
◽
pp. 387-399
◽
Cited By ~ 21
Author(s):
M.A. Beunder
◽
J.P. Kernhof
◽
B. Hoefflinger
Keyword(s):
High Performance
◽
Design Environment
◽
Asic Design
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Description of a design management system for the P-ASIC design flow using EXPDL
Formal Methods in System Design
◽
10.1007/bf01384082
◽
1994
◽
Vol 4
(2)
◽
pp. 155-166
Author(s):
W. M. H. M. Rovers
Keyword(s):
Management System
◽
Design Flow
◽
Design Management
◽
Asic Design
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Robustness and performance analysis on high speed ASIC design with canonical statistical timing model
2011 9th IEEE International Conference on ASIC
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10.1109/asicon.2011.6157205
◽
2011
◽
Author(s):
Suoming Pu
◽
Bo Yu
◽
Xuan Zou
Keyword(s):
Performance Analysis
◽
High Speed
◽
Asic Design
◽
Timing Model
◽
Statistical Timing
◽
And Performance
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Performance-Driven Dual-Rail Routing Architecture for Structured ASIC Design Style
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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10.1109/tcad.2010.2063111
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2010
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Vol 29
(12)
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pp. 2046-2050
◽
Cited By ~ 1
Author(s):
Fu-Wei Chen
◽
Yi-Yu Liu
Keyword(s):
Asic Design
◽
Design Style
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Considerations on teaching digital ASIC design
2014 IEEE/ASME 10th International Conference on Mechatronic and Embedded Systems and Applications (MESA)
◽
10.1109/mesa.2014.6935566
◽
2014
◽
Cited By ~ 1
Author(s):
Andreas Puhm
◽
Peter Rossler
Keyword(s):
Asic Design
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ASIC design for conditional nested loops with predicate registers
42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356)
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10.1109/mwscas.1999.867774
◽
2003
◽
Author(s):
B. Sinclair
◽
R.P. Light
◽
N.L. Passos
Keyword(s):
Asic Design
◽
Nested Loops
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