Studying the impacts of loop unrolling and pipeline in the FPGA design of the Simon and RoadRunneR lightweght ciphers

Author(s):  
G. Georgiou ◽  
G. Theodoridis
Keyword(s):  
2008 ◽  
Author(s):  
Michael Wirthlin ◽  
Brent Nelson ◽  
Brad Hutchings ◽  
Peter Athanas ◽  
Shawn Bohner

Author(s):  
Nils Voss ◽  
Tobias Becker ◽  
Simon Tilbury ◽  
Georgi Gaydadjiev ◽  
Oskar Mencer ◽  
...  
Keyword(s):  

2005 ◽  
Vol 3 (3) ◽  
pp. 30-33
Author(s):  
D. Shand
Keyword(s):  

Entropy ◽  
2021 ◽  
Vol 23 (5) ◽  
pp. 546
Author(s):  
Zhenni Li ◽  
Haoyi Sun ◽  
Yuliang Gao ◽  
Jiao Wang

Depth maps obtained through sensors are often unsatisfactory because of their low-resolution and noise interference. In this paper, we propose a real-time depth map enhancement system based on a residual network which uses dual channels to process depth maps and intensity maps respectively and cancels the preprocessing process, and the algorithm proposed can achieve real-time processing speed at more than 30 fps. Furthermore, the FPGA design and implementation for depth sensing is also introduced. In this FPGA design, intensity image and depth image are captured by the dual-camera synchronous acquisition system as the input of neural network. Experiments on various depth map restoration shows our algorithms has better performance than existing LRMC, DE-CNN and DDTF algorithms on standard datasets and has a better depth map super-resolution, and our FPGA completed the test of the system to ensure that the data throughput of the USB 3.0 interface of the acquisition system is stable at 226 Mbps, and support dual-camera to work at full speed, that is, 54 fps@ (1280 × 960 + 328 × 248 × 3).


2008 ◽  
Vol 43 (7) ◽  
pp. 141-150
Author(s):  
Mounira Bachir ◽  
Sid-Ahmed-Ali Touati ◽  
Albert Cohen

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