RSA decryption using the one-hot residue number system

Author(s):  
W.A. Chren ◽  
C.H. Brogdon
2012 ◽  
Vol 21 (04) ◽  
pp. 1250027 ◽  
Author(s):  
TSO-BING JUANG ◽  
CHAO-TSUNG KUO ◽  
GO-LONG WU ◽  
JIAN-HAO HUANG

In this paper, multifunction residue number system (RNS) modulo (2n ± 1) multipliers are proposed. By adopting common circuits for summing up the partial products with extra controls, our proposed multipliers could perform both modulo (2n + 1) and (2n - 1) multiplications. The levels for summation of partial products are n + 1, which are same as the conventional modulo multipliers which with only one kind of modulo multiplications. The proposed multifunction modulo (2n ± 1) multipliers can save at least about 42.5% area under the same delay constraints and above 65.8% Area × Delay Product (ADP) compared with the one composed of modulo (2n + 1) and modulo (2n - 1) multiplication operations. Our proposed multipliers could be applied to ease the tremendous computation overload in the real-time processing applications.


Author(s):  
Carlos Arturo Gayoso ◽  
Claudio Gonzalez ◽  
Leonardo Arnone ◽  
Miguel Rabini ◽  
Jorge Castineira Moreira

2016 ◽  
Vol 29 (1) ◽  
pp. 101-112
Author(s):  
Ivan Krstic ◽  
Negovan Stamenkovic ◽  
Vidosav Stojanovic

A binary-to-residues encoder (forward encoder) is an essential building block for the residue number system digital signal processing (RNS DSP) and as such it should be built with a minimal amount of hardware and be efficient in terms of speed and power. The main parts of the forward encoder are residue generators which are usually classified into two categories: the one based on arbitrary moduli-set which make use of look-up tables, and the other based on the special moduli sets. A new memory less architecture of binary-to-RNS encoder based on the special moduli set {2n?1,2n,2n+1} with embedded modulo 2n+1 channel in the diminished-1 representation is presented. Any of two channels (standard modulo 2n +1, or modulo 2n+1 in the diminished-1 representation) operation can be performed by using a single switch. The proposed encoder has been implemented on a Xilinx FPGA chip for the various dynamic range requirements.


2017 ◽  
Vol 8 (3) ◽  
pp. 189-200 ◽  
Author(s):  
Jean-Claude Bajard ◽  
Julien Eynard ◽  
Nabil Merkiche

Author(s):  
Mikhail Selianinau

AbstractIn this paper, we deal with the critical problem of performing non-modular operations in the Residue Number System (RNS). The Chinese Remainder Theorem (CRT) is widely used in many modern computer applications. Throughout the article, an efficient approach for implementing the CRT algorithm is described. The structure of the rank of an RNS number, a principal positional characteristic of the residue code, is investigated. It is shown that the rank of a number can be represented by a sum of an inexact rank and a two-valued correction to it. We propose a new variant of minimally redundant RNS, which provides low computational complexity for the rank calculation, and its effectiveness analyzed concerning conventional non-redundant RNS. Owing to the extension of the residue code, by adding the excess residue modulo 2, the complexity of the rank calculation goes down from $O\left (k^{2}\right )$ O k 2 to $O\left (k\right )$ O k with respect to required modular addition operations and lookup tables, where k equals the number of non-redundant RNS moduli.


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