oversampling ratio
Recently Published Documents


TOTAL DOCUMENTS

32
(FIVE YEARS 11)

H-INDEX

5
(FIVE YEARS 0)

Author(s):  
Juan J. Ocampo-Hidalgo ◽  
Javier Alducin-Castillo ◽  
Jesus E. Molinar-Solis

This paper introduces the experimental results obtained after processing an electrocardiographic signal by a full-custom, low-complexity, Sigma-Delta Modulator integrated circuit, designed and fabricated using the C5N CMOS technology available through MOSIS. By exploiting a large oversampling ratio, it was possible to obtain an effective number of bits equal to 11 at the proposed single-bit modulator’s output. The resulting bitstream was captured with a logic-state analyzer and processed offline. After decimation and digital filtering, the electrocardiographic signal was reconstructed and plotted in the time domain. Commonly referred quality metrics over the retrieved signal were calculated. A total signal-to-noise and distortion ratio, superior to 66[Formula: see text]dB, was achieved by analyzing the entire system. The proposed approach shows the feasibility of processing electrocardiographic signals using low-cost and straightforward CMOS technology circuits. Since the proposed converter uses a single voltage supply of 1.5[Formula: see text]V, exhibits a power consumption of 38[Formula: see text][Formula: see text]W, and uses a silicon area of 0.052[Formula: see text]mm2, it is suitable for single battery-operated systems on a chip.


2021 ◽  
Author(s):  
Parth Parekh

This report presents a low-power time integrator and its applications in an all-digital first-order ΔΣ time-to-digital converter (TDC). Time-to-Digital Converter (TDC) that map a time variable to a digital code is the most important building blocks of time-mode circuits. The time integrator is realized using a bi-directional gated delay line (BD-GDL) with time variable to be integrated as the gating signal. The integration of the time variable is obtained via the accumulation of the charge of the load capacitor and the logic state of gated delay stages. Issues affecting the performance of the time integrator and TDC are examined. The all-digital first-order ΔΣ TDC utilizing the time integrator was designed in using IBM 130 nm 1.2 V CMOS technology and analysed using Spectre ASP from Cadence Design Systems with BSIM4 models. A sinusoid time input of 333 ps amplitude and 231 kHz frequency with an oversampling ratio 68 was digitized by the modulator. The TDC provides first-order noise-shaping and a SNR of 34.64 dB over the signal band 48.27 ~ 231 kHz while consuming 293.8 μW.


2021 ◽  
Author(s):  
Parth Parekh

This report presents a low-power time integrator and its applications in an all-digital first-order ΔΣ time-to-digital converter (TDC). Time-to-Digital Converter (TDC) that map a time variable to a digital code is the most important building blocks of time-mode circuits. The time integrator is realized using a bi-directional gated delay line (BD-GDL) with time variable to be integrated as the gating signal. The integration of the time variable is obtained via the accumulation of the charge of the load capacitor and the logic state of gated delay stages. Issues affecting the performance of the time integrator and TDC are examined. The all-digital first-order ΔΣ TDC utilizing the time integrator was designed in using IBM 130 nm 1.2 V CMOS technology and analysed using Spectre ASP from Cadence Design Systems with BSIM4 models. A sinusoid time input of 333 ps amplitude and 231 kHz frequency with an oversampling ratio 68 was digitized by the modulator. The TDC provides first-order noise-shaping and a SNR of 34.64 dB over the signal band 48.27 ~ 231 kHz while consuming 293.8 μW.


2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Peng Li ◽  
Wei Xi ◽  
Xiangjun Zeng ◽  
Xiaobo Li ◽  
Dandan Zheng

This paper introduces a small-area, low-power delta-sigma DAC that can support power line carrier communication. In order to achieve the oversampling ratio of 128, a three-stage cascaded half-band filter is utilized. An optimized sturdy MASH Δ Σ modulator was used to avoid instability caused by high-order shaping and reduce the area at the same time. The postanalog reconstruction includes a switched-capacitor DAC (SC DAC) and a 4-tap FIR/IIR hybrid filter, which not only meets the requirements of low power but also promotes the out-of-band SNR. The final chip is fabricated in a 55 nm CMOS process, occupies 0.08 mm2, and consumes 1.5 mW of analog power at 2.5 V supply. The simulation results show that the dynamic range is 85.7 dB, while the out-of-band SNR is 40.5 dB.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 213
Author(s):  
Hyunmin Park ◽  
Hyungil Chae ◽  
Jintae Kim

This paper presents an optimal digital filtering technique to enhance the resolution of incremental delta-sigma modulators (incremental DSMs, IDSMs) using a low-power passive integrator. We first describe a link between a passive integrator and its impact on the output of the IDSM. We then show that the optimal digital filter design can be cast as a convex optimization problem, which can be efficiently solved. As a test vehicle of the proposed technique, we use a behavioral 2nd-order IDSM model that captures critical non-idealities of the integrator, such as gain compression and output saturation. The effectiveness of the presented technique is verified using extensive simulations. The result shows that the presented filtering technique improves signal-to-noise and distortion ratio (SNDR) by 15 dB–20 dB, achieving SNDR over 90 dB when the oversampling ratio (OSR) = 256, and this corresponds to best-in-class performance when compared to previously published DSM designs using passive integrators.


2020 ◽  
Vol 13 (S10) ◽  
Author(s):  
Yanyun Tao ◽  
Yuzhen Zhang ◽  
Bin Jiang

Abstract Background Vitamin K antagonist (warfarin) is the most classical and widely used oral anticoagulant with assuring anticoagulant effect, wide clinical indications and low price. Warfarin dosage requirements of different patients vary largely. For warfarin daily dosage prediction, the data imbalance in dataset leads to inaccurate prediction on the patients of rare genotype, who usually have large stable dosage requirement. To balance the dataset of patients treated with warfarin and improve the predictive accuracy, an appropriate partition of majority and minority groups, together with an oversampling method, is required. Method To solve the data-imbalance problem mentioned above, we developed a clustering-based oversampling technique denoted as DBCSMOTE, which combines density-based spatial clustering of application with noise (DBCSCAN) and synthetic minority oversampling technique (SMOTE). DBCSMOTE automatically finds the minority groups by acquiring the association between samples in terms of the clinical features/genotypes and the warfarin dosage, and creates an extended dataset by adding the new synthetic samples of majority and minority groups. Meanwhile, two ensemble models, boosted regression tree (BRT) and random forest (RF), which are built on the extended dataset generateed by DBCSMOTE, accomplish the task of warfarin daily dosage prediction. Results DBCSMOTE and the comparison methods were tested on the datasets derived from our Hospital and International Warfarin Pharmacogenetics Consortium (IWPC). As the results, DBCSMOTE-BRT obtained the highest R-squared (R2) of 0.424 and the smallest mean squared error (mse) of 1.08. In terms of the percentage of patients whose predicted dose of warfarin is within 20% of the actual stable therapeutic dose (20%-p), DBCSMOTE-BRT can achieve the largest value of 47.8% among predictive models. The more important thing is that DBCSMOTE saved about 68% computational time to achieve the same or better performance than the Evolutionary SMOTE, which was the best oversampling method in warfarin dose prediction by far. Meanwhile, in warfarin dose prediction, it is discovered that DBCSMOTE is more effective in  integrating BRT than RF  for warfarin dose prediction. Conclusion Our finding is that the genotypes, CYP2C9 and VKORC1, no doubt contribute to the predictive accuracy. It was also discovered left atrium diameter, glutamic pyruvic transaminase and serum creatinine included in the model actually improved the predictive accuracy; When congestive heart failure, diabetes mellitus and valve replacement were absent in DBCSMOTE-BRT/RF, the predictive accuracy of DBCSMOTE-BRT/RF decreased. The oversampling ratio and number of minority clusters have a large impact on the effect of oversampling. According to our test, the predictive accuracy was high when the number of minority clusters was 6 ~ 8. The oversampling ratio for small minority clusters should be large (> 1.2) and for large minority clusters should be small (< 0.2). If the dataset becomes larger, the DBCSMOTE would be re-optimized and its BRT/RF model should be re-trained. DBCSMOTE-BRT/RF outperformed the current commonly-used tool called Warfarindosing. As compared to Evolutionary SMOTE-BRT and RF  models, DBCSMOTE-BRT and RF models take only a small computational time to achieve the same or higher performance in many cases. In terms of predictive accuracy, RF is not as good as BRT. However, RF still has a powerful ability in generating a highly accurate model as the dataset increases; the software “WarfarinSeer v2.0” is a test version, which packed DBCSMOTE-BRT/RF. It could be a convenient tool for clinical application in warfarin treatment.


Sign in / Sign up

Export Citation Format

Share Document