In the distributed control system, to make sure the running of the system bus is long-term, stable and reliable, we design a new intelligent redundant serial bus as the system bus, and it will be introduced in this article. The new intelligent redundant serial bus (IRSBUS) is able to be configured into a dual redundant synchronous bus or a quadruple redundant asynchronous bus, and its redundancy is hot redundant that means two groups of the four signals are working together. We mainly design a redundant IP core, a redundant protocol and the byte format. The IP core of IRSBUS consists of the following major modules: Intelligent Signal Router, Signal Transceiver, Lines-connecting Status Detector, Synchronous Controller (Master), Synchronous Transponder (Slave), Redundant Results Decider, Interrupt Generator, Dual-port RAMs, Control and Status Registers, Master / Slave Redundant Logical Controller. The redundant protocol and byte format provide an extremely strict timing to synchronize the master-slaves and transmit the information. We show that our design allow to compare the redundant data to arrive at the correct results. It also provides a way to regroup the remaining signal lines into a system bus when one or two of the four signal lines are broken. And then it detects the lines-connection status every 100 milliseconds.
On-The-Fly Parallel Processing IP-Core for Image Blur Detection, Compression, and Chaotic Encryption Based on FPGA