scholarly journals Low-Latency Lattice-Reduction-Aided One-Bit Precoding Processor for 64-QAM 4×64 MU–MIMO Systems

2021 ◽  
Vol 2 ◽  
pp. 472-484
Author(s):  
Pao-Pao Ho ◽  
Chiao-En Chen ◽  
Yuan-Hao Huang
Information ◽  
2020 ◽  
Vol 11 (6) ◽  
pp. 301
Author(s):  
Samarendra Nath Sur ◽  
Rabindranath Bera ◽  
Akash Kumar Bhoi ◽  
Mahaboob Shaik ◽  
Gonçalo Marques

Massive multi-input-multi-output (MIMO) systems are the future of the communication system. The proper design of the MIMO system needs an appropriate choice of detection algorithms. At the same time, Lattice reduction (LR)-aided equalizers have been well investigated for MIMO systems. Many studies have been carried out over the Korkine–Zolotareff (KZ) and Lenstra–Lenstra–Lovász (LLL) algorithms. This paper presents an analysis of the channel capacity of the massive MIMO system. The mathematical calculations included in this paper correspond to the channel correlation effect on the channel capacity. Besides, the achievable gain over the linear receiver is also highlighted. In this study, all the calculations were further verified through the simulated results. The simulated results show the performance comparison between zero forcing (ZF), minimum mean squared error (MMSE), integer forcing (IF) receivers with log-likelihood ratio (LLR)-ZF, LLR-MMSE, KZ-ZF, and KZ-MMSE. The main objective of this work is to show that, when a lattice reduction algorithm is combined with the convention linear MIMO receiver, it improves the capacity tremendously. The same is proven here, as the KZ-MMSE receiver outperforms its counterparts in a significant margin.


Sign in / Sign up

Export Citation Format

Share Document