SPREX: A soft processor with Runahead execution

2012 ◽  
Author(s):  
Kaveh Aasaraai ◽  
Andreas Moshovos
Keyword(s):  
Runahead Execution

scholarly journals NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution

2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
Kaveh Aasaraai ◽  
Andreas Moshovos
Keyword(s):  
High Efficiency ◽  
Main Memory ◽  
Data Cache ◽  
Improve Performance ◽  
Data Caches ◽  
Content Addressable Memories ◽  
Processor Designs ◽  
Level Parallelism ◽  
Order Execution ◽  
Runahead Execution

Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency, simple, blocking caches are used. Such caches are not appropriate for processor designs such as Runahead and out-of-order execution that require nonblocking caches to tolerate main memory latencies. Instead, these processors use non-blocking caches to extract memory level parallelism and improve performance. However, conventional non-blocking cache designs are expensive and slow on FPGAs as they use content-addressable memories (CAMs). This work proposes NCOR, an FPGA-friendly non-blocking cache that exploits the key properties of Runahead execution. NCOR does not require CAMs and utilizes smart cache controllers. A 4 KB NCOR operates at 329 MHz on Stratix III FPGAs while it uses only 270 logic elements. A 32 KB NCOR operates at 278 Mhz and uses 269 logic elements.

Register Flush-free Runahead Execution for Modern Vector Processors

2021 ◽  
Author(s):  
Hikaru Takayashiki ◽  
Masayuki Sato ◽  
Kazuhiko Komatsu ◽  
Hiroaki Kobayashi
Keyword(s):  
Vector Processors ◽  
Runahead Execution

scholarly journals Precise Runahead Execution

2020 ◽  
Author(s):  
Ajeya Naithani ◽  
Josue Feliu ◽  
Almutaz Adileh ◽  
Lieven Eeckhout
Keyword(s):  
Runahead Execution

scholarly journals Techniques for Efficient Processing in Runahead Execution Engines

2005 ◽  
Vol 33 (2) ◽  
pp. 370-381 ◽  
Author(s):  
Onur Mutlu ◽  
Hyesoon Kim ◽  
Yale N. Patt
Keyword(s):  
Efficient Processing ◽  
Runahead Execution

On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor

2005 ◽  
Vol 4 (1) ◽  
pp. 2-2 ◽  
Author(s):  
O. Mutlu ◽  
Hyesoon Kim ◽  
J. Stark ◽  
Y.N. Patt
Keyword(s):  
Runahead Execution

An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors

2005 ◽  
Vol 54 (12) ◽  
pp. 1556-1571 ◽  
Author(s):  
O. Mutlu ◽  
Hyesoon Kim ◽  
D.N. Armstrong ◽  
Y.N. Patt
Keyword(s):  
Performance Impact ◽  
Runahead Execution
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