32nd International Symposium on Computer Architecture (ISCA'05)
Latest Publications

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Published By IEEE

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Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A Tree Based Router Search Engine Architecture with Single Port Memories

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.7 ◽

2005 ◽

Cited By ~ 45

Author(s):

F. Baboescu ◽

D.M. Tullsen ◽

G. Rosu ◽

S. Singh

Keyword(s):

Search Engine ◽

Single Port ◽

Search Engine Architecture

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Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.37 ◽

2005 ◽

Cited By ~ 17

Author(s):

Daeho Seo ◽

A. Ali ◽

Won-Taek Lim ◽

N. Rafique ◽

M. Thottethodi

Keyword(s):

Mesh Networks ◽

Two Dimensional ◽

Worst Case

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Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.22 ◽

2005 ◽

Cited By ~ 73

Author(s):

G.E. Suh ◽

C.W. O'Donnell ◽

I. Sachdev ◽

S. Devadas

Keyword(s):

Single Chip ◽

Random Functions ◽

Design And Implementation

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An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.10 ◽

2005 ◽

Cited By ~ 24

Author(s):

S. Balensiefer ◽

L. Kregor-Stickles ◽

M. Oskin

Keyword(s):

Ion Trap ◽

Evaluation Framework ◽

Instruction Set ◽

Instruction Set Architecture

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The V-Way Cache: Demand Based Associativity via Global Replacement

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.52 ◽

2005 ◽

Cited By ~ 38

Author(s):

M.K. Qureshi ◽

D. Thompson ◽

Y.N. Patt

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Store Buffer Design in First-Level Multibanked Data Caches

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.47 ◽

2005 ◽

Cited By ~ 16

Author(s):

E.F. Torres ◽

P. Ibanez ◽

V. Vinals ◽

J.M. Llaberia

Keyword(s):

Data Caches ◽

Buffer Design

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Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.24 ◽

2005 ◽

Cited By ~ 27

Author(s):

S. Gurumurthi ◽

A. Sivasubramaniam ◽

V.K. Natarajan

Keyword(s):

Thermal Management ◽

Disk Drive ◽

Dynamic Thermal Management

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Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.27 ◽

2005 ◽

Cited By ~ 1

Author(s):

V. Petric ◽

A. Roth

Keyword(s):

Energy Aware ◽

Energy Effectiveness

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An Ultra Low Power System Architecture for Sensor Network Applications

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.12 ◽

2005 ◽

Cited By ~ 58

Author(s):

M. Hempstead ◽

N. Tripathi ◽

P. Mauro ◽

Gu-Yeon Wei ◽

D. Brooks

Keyword(s):

Power System ◽

Low Power ◽

Sensor Network ◽

System Architecture ◽

Ultra Low Power ◽

Network Applications ◽

Low Power System

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Improving Program Efficiency by Packing Instructions into Registers

32nd International Symposium on Computer Architecture (ISCA'05) ◽

10.1109/isca.2005.32 ◽

2005 ◽

Cited By ~ 13

Author(s):

S. Hines ◽

J. Green ◽

G. Tyson ◽

D. Whalley

Keyword(s):

Program Efficiency

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32nd International Symposium on Computer Architecture (ISCA'05)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Tree Based Router Search Engine Architecture with Single Port Memories

Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks

Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions

An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures

The V-Way Cache: Demand Based Associativity via Global Replacement

Store Buffer Design in First-Level Multibanked Data Caches

Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management

Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection

An Ultra Low Power System Architecture for Sensor Network Applications

Improving Program Efficiency by Packing Instructions into Registers

32nd International Symposium on Computer Architecture (ISCA'05)
Latest Publications