VHDL implementation of novel squaring circuit based on Vedic mathematics

Proceedings of International Conference on Soft Computing Techniques and Engineering Application - Advances in Intelligent Systems and Computing ◽

VHDL Implementation of Complex Number Multiplier Using Vedic Mathematics

10.1007/978-81-322-1695-7_46 ◽

2013 ◽

pp. 403-410 ◽

Author(s):

Laxman P. Thakare ◽

A. Y. Deshmukh ◽

Gopichand D. Khandale

Keyword(s):

Complex Number ◽

Vedic Mathematics ◽

VHDL implementation of high performance RC6 algorithm using ancient Indian vedic mathematics

2011 3rd International Conference on Electronics Computer Technology ◽

10.1109/icectech.2011.5941874 ◽

2011 ◽

Author(s):

S Leonard Gibson Moses ◽

M Thilagar

Keyword(s):

High Performance ◽

Vedic Mathematics ◽

2014 11th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON) ◽

High speed convolution and deconvolution algorithm (Based on Ancient Indian Vedic Mathematics)

10.1109/ecticon.2014.6839756 ◽

2014 ◽

Author(s):

Surabhi Jain ◽

Sandeep Saini

Keyword(s):

High Speed ◽

Vedic Mathematics ◽

Deconvolution Algorithm

Design of High Performance ALU Using Vedic Mathematics

Journal of Physics Conference Series ◽

10.1088/1742-6596/1964/6/062031 ◽

2021 ◽

Vol 1964 (6) ◽

pp. 062031

Author(s):

V Swathi ◽

Kavitha Panduga ◽

Gurrala Shiva Kumari

Keyword(s):

High Performance ◽

Vedic Mathematics

Performance analysis of Vedic mathematics algorithms on re-configurable hardware platform

Sadhana ◽

10.1007/s12046-021-01605-4 ◽

2021 ◽

Vol 46 (2) ◽

Author(s):

Rhea Biji ◽

Vijay Savani

Keyword(s):

Performance Analysis ◽

Hardware Platform ◽

Vedic Mathematics ◽

Configurable Hardware

Use of Vedic Mathematics to Speed-up Basic Mathematical Operations in Android Based Calculator

2019 International Conference on Intelligent Sustainable Systems (ICISS) ◽

10.1109/iss1.2019.8907961 ◽

2019 ◽

Author(s):

Lakshmi Mandal ◽

Kousik Dasgupta

Keyword(s):

Vedic Mathematics ◽

Speed Up ◽

Mathematical Operations

FPGA based Vedic Mathematics Applications: An Eagle Eye

10.1109/icirca51532.2021.9544569 ◽

2021 ◽

Author(s):

Dinubhau B. Alaspure ◽

Swati R Dixit

Keyword(s):

Vedic Mathematics

2018 IEEE 38th International Conference on Electronics and Nanotechnology (ELNANO) ◽

A Scalable VHDL-Implementation Technique of the Priority Encoder Structure into FPGA

10.1109/elnano.2018.8477465 ◽

2018 ◽

Cited By ~ 2

Author(s):

Roman D. Yershov

Keyword(s):

Priority Encoder ◽

Implementation Technique ◽

2014 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting ◽

VHDL implementation of a No-Reference video quality metric using the Levenberg-Marquardt method

10.1109/bmsb.2014.6873474 ◽

2014 ◽

Author(s):

Marcelo de Oliveira ◽

Wyllian Bezerra da Silva ◽

Keiko Veronica Ono Fonseca ◽

Alexandre de Almeida Prado Pohl

Keyword(s):

Video Quality ◽

Quality Metric ◽

Marquardt Method ◽

Levenberg Marquardt ◽

Video Quality Metric ◽

Design of an Efficient Binary Vedic Multiplier for High Speed Applications Using Vedic Mathematics with Bit Reduction Technique

Circuits and Systems ◽

10.4236/cs.2016.79224 ◽

2016 ◽

Vol 07 (09) ◽

pp. 2593-2602 ◽

Author(s):

S. K. Manikandan ◽

C. Palanisamy

Keyword(s):

High Speed ◽

Reduction Technique ◽

Vedic Mathematics ◽

Vedic Multiplier