Random number generation using field programmable analog array implementation of logistic map

Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995.

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True Random Number Generation from Bioelectrical and Physical Signals

Computational and Mathematical Methods in Medicine ◽

10.1155/2018/3579275 ◽

2018 ◽

Vol 2018 ◽

pp. 1-11 ◽

Cited By ~ 5

Author(s):

Seda Arslan Tuncer ◽

Turgay Kaya

Keyword(s):

Blood Volume ◽

Random Number ◽

Logistic Map ◽

Random Number Generation ◽

Statistical Properties ◽

Random Numbers ◽

Number Generation ◽

Skin Response ◽

Volume Pulse ◽

Blood Volume Pulse

It is possible to generate personally identifiable random numbers to be used in some particular applications, such as authentication and key generation. This study presents the true random number generation from bioelectrical signals like EEG, EMG, and EOG and physical signals, such as blood volume pulse, GSR (Galvanic Skin Response), and respiration. The signals used in the random number generation were taken from BNCIHORIZON2020 databases. Random number generation was performed from fifteen different signals (four from EEG, EMG, and EOG and one from respiration, GSR, and blood volume pulse datasets). For this purpose, each signal was first normalized and then sampled. The sampling was achieved by using a nonperiodic and chaotic logistic map. Then, XOR postprocessing was applied to improve the statistical properties of the sampled numbers. NIST SP 800-22 was used to observe the statistical properties of the numbers obtained, the scale index was used to determine the degree of nonperiodicity, and the autocorrelation tests were used to monitor the 0-1 variation of numbers. The numbers produced from bioelectrical and physical signals were successful in all tests. As a result, it has been shown that it is possible to generate personally identifiable real random numbers from both bioelectrical and physical signals.

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Generalized delayed logistic map suitable for pseudo-random number generation

2015 International Conference on Science and Technology (TICST) ◽

10.1109/ticst.2015.7369380 ◽

2015 ◽

Cited By ~ 4

Author(s):

Samar M. Ismail ◽

Lobna A. Said ◽

Ahmed G. Radwan ◽

Ahmed H. Madian ◽

Mohamed F. Abu-ElYazeed ◽

...

Keyword(s):

Random Number ◽

Logistic Map ◽

Random Number Generation ◽

Number Generation ◽

Pseudo Random Number

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Field programmable analog array implementation of logistic map

2013 21st Signal Processing and Communications Applications Conference (SIU) ◽

10.1109/siu.2013.6531345 ◽

2013 ◽

Cited By ~ 1

Author(s):

I. Cicek ◽

A. E. Pusane ◽

G. Dundar

Keyword(s):

Logistic Map ◽

Programmable Analog ◽

Field Programmable ◽

Field Programmable Analog Array

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Implementation of Hardware-Accelerated Scalable Parallel Random Number Generators

VLSI Design ◽

10.1155/2010/930821 ◽

2010 ◽

Vol 2010 ◽

pp. 1-11 ◽

Cited By ~ 1

Author(s):

JunKyu Lee ◽

Gregory D. Peterson ◽

Robert J. Harrison ◽

Robert J. Hinde

Keyword(s):

Monte Carlo ◽

Reconfigurable Computing ◽

Random Number ◽

Random Number Generation ◽

Random Number Generators ◽

Fine Grained ◽

Number Generation ◽

Field Programmable ◽

Programmable Gate Arrays ◽

Parallel Random Number Generators

The Scalable Parallel Random Number Generators (SPRNGs) library is widely used in computational science applications such as Monte Carlo simulations since SPRNG supports fast, parallel, and scalable random number generation with good statistical properties. In order to accelerate SPRNG, we develop a Hardware-Accelerated version of SPRNG (HASPRNG) on the Xilinx XC2VP50 Field Programmable Gate Arrays (FPGAs) in the Cray XD1 that produces identical results. HASPRNG includes the reconfigurable logic for FPGAs along with a programming interface which performs integer random number generation. To demonstrate HASPRNG for Reconfigurable Computing (RC) applications, we also develop a Monte Carlo π-estimator for the Cray XD1. The RC Monte Carlo π-estimator shows a 19.1× speedup over the 2.2 GHz AMD Opteron processor in the Cray XD1. In this paper we describe the FPGA implementation for HASPRNG and a π-estimator example application exploiting the fine-grained parallelism and mathematical properties of the SPRNG algorithm.

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