A high speed deblocking filter architecture for H.264/AVC

Author(s):  
Jinjia Zhou ◽  
Dajiang Zhou ◽  
Xun He ◽  
Satoshi Goto
2019 ◽  
Vol 9 (2) ◽  
pp. 329 ◽  
Author(s):  
Hayoung Byun ◽  
Hyesook Lim

Network traffic has increased rapidly in recent years, mainly associated with the massive growth of various applications on mobile devices. Named data networking (NDN) technology has been proposed as a future Internet architecture for effectively handling this ever-increasing network traffic. In order to realize the NDN, high-speed lookup algorithms for a forwarding information base (FIB) are crucial. This paper proposes a level-priority trie (LPT) and a 2-phase Bloom filter architecture implementing the LPT. The proposed Bloom filters are sufficiently small to be implemented with on-chip memories (less than 3 MB) for FIB tables with up to 100,000 name prefixes. Hence, the proposed structure enables high-speed FIB lookup. The performance evaluation result shows that FIB lookups for more than 99.99% of inputs are achieved without needing to access the database stored in an off-chip memory.


2019 ◽  
Vol 16 (22) ◽  
pp. 20190500-20190500 ◽  
Author(s):  
Prayline Rajabai Christopher ◽  
Sivanantham Sathasivam

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