Modeling of Substrate Noise Effects in Dynamic CMOS Circuits

2008 IEEE Region 5 Conference ◽

10.1109/tpsd.2008.4562723 ◽

2008 ◽

Author(s):

Sagar. R. Gosavi ◽

Waleed K. Al-Assadi ◽

Sasikiran Burugapalli

Keyword(s):

Cmos Circuits ◽

Substrate Noise ◽

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Resonant forward-biased guard-ring diodes for suppression of substrate noise in mixed-mode CMOS circuits

Electronics Letters ◽

10.1049/el:19950505 ◽

1995 ◽

Vol 31 (9) ◽

pp. 720 ◽

Author(s):

L. Forbes ◽

B. Ficq ◽

S. Savage

Keyword(s):

Cmos Circuits ◽

Substrate Noise

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Analysis of the Substrate Noise Effects due to DC-DC Converter Integration

2006 Ph.D. Research in Microelectronics and Electronics ◽

10.1109/rme.2006.1689893 ◽

2006 ◽

Author(s):

R.M. Vinella ◽

R. Antonicelli

Keyword(s):

Substrate Noise ◽

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Experimental Study on Substrate Noise Effects of a Pulsed Clocking Scheme on PLL Performance

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2013.2281942 ◽

2013 ◽

Vol 60 (12) ◽

pp. 852-856 ◽

Author(s):

R. R. Manikandan ◽

Bharadwaj Amrutur

Keyword(s):

Experimental Study ◽

Substrate Noise ◽

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Guard ring diodes for suppression of substrate noise and improved reliability in mixed-mode CMOS circuits

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits ◽

10.1109/ipfa.1995.487613 ◽

2002 ◽

Author(s):

L. Forbes ◽

W.T. Lim ◽

K.T. Yan

Keyword(s):

Cmos Circuits ◽

Substrate Noise

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Analysis of GroundBounce Induced Substrate Noise Coupling in a Low Resistive Bulk Epitaxial Process: Design Strategies to Minimize Noise Effects on a MixedSignal Chip

Signal Integrity Effects in Custom IC and ASIC Designs ◽

10.1109/9780470546413.ch48 ◽

2009 ◽

Keyword(s):

Process Design ◽

Substrate Noise ◽

Design Strategies ◽

Noise Effects ◽

Noise Coupling ◽

Substrate Noise Coupling

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Analysis of ground-bounce induced substrate noise coupling in a low resistive bulk epitaxial process: design strategies to minimize noise effects on a mixed-signal chip

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.803483 ◽

1999 ◽

Vol 46 (11) ◽

pp. 1427-1436 ◽

Author(s):

M. Felder ◽

J. Ganger

Keyword(s):

Process Design ◽

Substrate Noise ◽

Design Strategies ◽

Noise Effects ◽

Mixed Signal ◽

Noise Coupling ◽

Ground Bounce ◽

Substrate Noise Coupling

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Practice: Conference examines noise effects

PsycEXTRA Dataset ◽

10.1037/e382282004-023 ◽

1990 ◽

Author(s):

Susan Landers

Keyword(s):

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Harmonic and intermodulation performance of analogue CMOS circuits owing to mobility reduction

IEE Proceedings G Circuits Devices and Systems ◽

10.1049/ip-g-2.1991.0013 ◽

1991 ◽

Vol 138 (1) ◽

pp. 65

Author(s):

M.T. Abuelma'atti

Keyword(s):

Cmos Circuits ◽

Intermodulation Performance ◽

Mobility Reduction

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My-box representation for faulty CMOS circuits

IEE Proceedings G Circuits Devices and Systems ◽

10.1049/ip-g-2.1990.0034 ◽

1990 ◽

Vol 137 (3) ◽

pp. 225 ◽

Author(s):

J.-E. Chen ◽

C.L. Lee ◽

W.-Z. Shen

Keyword(s):

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Noise Effects on Generalized Chaos Synchronization in Semiconductor Lasers

IEICE Proceeding Series ◽

10.15248/proc.2.413 ◽

2014 ◽

Vol 2 ◽

pp. 413-416

Author(s):

Kenichi Arai ◽

Susumu Shinohara ◽

Satoshi Sunada ◽

Kazuyuki Yoshimura ◽

Takahisa Harayama ◽

...

Keyword(s):

Semiconductor Lasers ◽

Chaos Synchronization ◽

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