A Novel Solid-State Fault Current-Limiting Circuit Breaker for Medium-Voltage Network Applications

2016 ◽  
Vol 31 (1) ◽  
pp. 236-244 ◽  
Author(s):  
Hamid Radmanesh ◽  
S. H. Fathi ◽  
G. B. Gharehpetian ◽  
Amir Heidary
2021 ◽  
Author(s):  
Juheng Wang ◽  
Kun Dong ◽  
Jianfeng Zhao ◽  
Zhan Shi ◽  
Yue Yu ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (10) ◽  
pp. 1204
Author(s):  
Gul Ahmad Ludin ◽  
Mohammad Amin Amin ◽  
Hidehito Matayoshi ◽  
Shriram S. Rangarajan ◽  
Ashraf M. Hemeida ◽  
...  

This paper proposes a new and surge-less solid-state direct current (DC) circuit breaker in a high-voltage direct current (HVDC) transmission system to clear the short-circuit fault. The main purpose is the fast interruption and surge-voltage and over-current suppression capability analysis of the breaker during the fault. The breaker is equipped with series insulated-gate bipolar transistor (IGBT) switches to mitigate the stress of high voltage on the switches. Instead of conventional metal oxide varistor (MOV), the resistance–capacitance freewheeling diodes branch is used to bypass the high fault current and repress the over-voltage across the circuit breaker. The topology and different operation modes of the proposed breaker are discussed. In addition, to verify the effectiveness of the proposed circuit breaker, it is compared with two other types of surge-less solid-state DC circuit breakers in terms of surge-voltage and over-current suppression. For this purpose, MATLAB Simulink simulation software is used. The system is designed for the transmission of 20 MW power over a 120 km distance where the voltage of the transmission line is 220 kV. The results show that the fault current is interrupted in a very short time and the surge-voltage and over-current across the proposed breaker are considerably reduced compared to other topologies.


2014 ◽  
Vol 556-562 ◽  
pp. 1959-1963
Author(s):  
Si Ming Wei ◽  
Yi Gong Zhang ◽  
Huan Liu ◽  
Zhi Qiang Dai ◽  
Xiao Du

It is great significance for development of MTDC (Multi-terminal HVDC) to build DC transmission and distribution grids. However, the relatively low impedance in DC grids makes the fault penetration much faster and deeper .Consequently, fast and reliable DC circuit breaker is needed to isolate faults. Breaking time and other parameters are important for a breaker to achieve its goals. This paper presents a DC circuit breaker with a current-limiting inductance and gets the rising and falling characteristics of fault current. Based on the characteristics, a design method of breaking time sequence will be given, as well as the calculation of current-limiting inductance and the selection principles of arresters. A 10kV DC distribution grid is modeled and simulated by PSCAD/EMTDC to verify that the method can meet the requirements of breaking fault current quickly and reliably.


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