Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I—Device–Circuit Interaction and Evaluation at Device Level

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2013.2293135 ◽

2014 ◽

Vol 22 (12) ◽

pp. 2488-2498 ◽

Author(s):

David Esseni ◽

Manuel Guglielmini ◽

Bernard Kapidani ◽

Tommaso Rollo ◽

Massimo Alioto

Keyword(s):

Vlsi Circuits ◽

Digital Vlsi ◽

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Tunnel FETs for Ultra-Low Voltage Digital VLSI Circuits: Part II–Evaluation at Circuit Level and Design Perspectives

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2013.2293153 ◽

2014 ◽

Vol 22 (12) ◽

pp. 2499-2512 ◽

Author(s):

Massimo Alioto ◽

David Esseni

Keyword(s):

Low Voltage ◽

Vlsi Circuits ◽

Digital Vlsi ◽

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A static noise impact analysis methodology for evaluating transient error effects in digital VLSI circuits

IEEE International Conference on Test, 2005. ◽

10.1109/test.2005.1584071 ◽

2006 ◽

Author(s):

Chong Zhao ◽

Xiaoliang Bai ◽

S. Dey

Keyword(s):

Impact Analysis ◽

Vlsi Circuits ◽

Digital Vlsi ◽

Analysis Methodology ◽

Noise Impact ◽

Transient Error ◽

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Power bus maximum voltage drop in digital VLSI circuits

Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525) ◽

10.1109/isqed.2000.838881 ◽

2002 ◽

Author(s):

G. Bai ◽

S. Bobba ◽

I.N. Hajj

Keyword(s):

Voltage Drop ◽

Vlsi Circuits ◽

Digital Vlsi ◽

Power Bus ◽

Maximum Voltage

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Approximate Testing of Digital VLSI Circuits using Error Significance based Fault Analysis

2020 24th International Symposium on VLSI Design and Test (VDAT) ◽

10.1109/vdat50263.2020.9190571 ◽

2020 ◽

Author(s):

Sisir Kumar Jena ◽

Santosh Biswas ◽

Jatindra Kumar Deka

Keyword(s):

Fault Analysis ◽

Vlsi Circuits ◽

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Special issue on analog design issues in digital VLSI circuits and systems

Analog Integrated Circuits and Signal Processing ◽

10.1007/bf00194911 ◽

1996 ◽

Vol 9 (3) ◽

Keyword(s):

Vlsi Circuits ◽

Analog Design ◽

Design Issues ◽

Special Issue ◽

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Optimized decoupling concepts for digital VLSI circuits

2001 IEEE EMC International Symposium. Symposium Record. International Symposium on Electromagnetic Compatibility (Cat. No.01CH37161) ◽

10.1109/isemc.2001.950503 ◽

2002 ◽

Author(s):

J. Held ◽

T. Wolf

Keyword(s):

Vlsi Circuits ◽

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Redesign strategies for digital VLSI circuits with incomplete implementation information

1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268) ◽

10.1109/mwscas.1998.759483 ◽

2002 ◽

Author(s):

M.A. Khalil ◽

Chin-Long Wey

Keyword(s):

Vlsi Circuits ◽

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An approach to the analysis and test of crosstalk faults in digital VLSI circuits

10.1109/edac.1991.206363 ◽

2002 ◽

Author(s):

A. Rubio ◽

N. Itazaki ◽

X. Xu ◽

K. Kinoshita

Keyword(s):

Vlsi Circuits ◽

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Partitioning algorithm to enhance pseudoexhaustive testing of digital VLSI circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.902271 ◽

2000 ◽

Vol 8 (6) ◽

pp. 750-754 ◽

Author(s):

B. Shaer ◽

D. Landis ◽

A. Al-Arian

Keyword(s):

Vlsi Circuits ◽

Digital Vlsi ◽

Partitioning Algorithm

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Noise spikes in digital VLSI circuits

IEEE Transactions on Electron Devices ◽

10.1109/t-ed.1982.20722 ◽

1982 ◽

Vol 29 (3) ◽

pp. 451-458 ◽

Author(s):

J.T. Wallmark

Keyword(s):

Vlsi Circuits ◽

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