A low-power and small-area all-digital spread-spectrum clock generator in 65nm CMOS technology

Author(s):  
Ching-Che Chung ◽  
Duo Sheng ◽  
Wei-Da Ho
2014 ◽  
Vol 3 (6) ◽  
pp. 404-409
Author(s):  
Dongsoo Lee ◽  
Jinwook Choi ◽  
Seongjin Oh ◽  
SangYun Kim ◽  
Kang-Yoon Lee

Author(s):  
Andreas Bahr ◽  
Lait Abu Saleh ◽  
Robin Hinsch ◽  
Dietmar Schroeder ◽  
Dirk Isbrandt ◽  
...  

Author(s):  
Ching-Che Chung ◽  
Duo Sheng ◽  
Wei-Da Ho

2013 ◽  
Vol 78 (3) ◽  
pp. 843-852
Author(s):  
Hong Jin Kim ◽  
Chang-Zhi Yu ◽  
Dong Soo Lee ◽  
Kang-Yoon Lee

2002 ◽  
Vol 37 (11) ◽  
pp. 1414-1420 ◽  
Author(s):  
Chulwoo Kim ◽  
In-Chul Hwang ◽  
Sung-Mo Kang
Keyword(s):  

In this paper we discussed about different types of techniques used to design mixer, VGA and PLL circuits for Software Defined Radio (SDR). Software Defined Radio is a type of radio wherein some of the conventional hardware component is replace by a software component making it more versatile. Here we are concentrating on the hardware component of SDR. Various techniques in CMOS technology is reviewed here for example two stage amplifier, cascading of VGA blocks, PLL as a clock generator and conventional fine loop are discussed. By using CMOS technology, the IC chips can be developed within a small area and also power optimization can also be done.


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