System-level Early-stage Modeling and Evaluation of IVR-assisted Processor Power Delivery System

Despite being employed in numerous efforts to improve power delivery efficiency, the integrated voltage regulator (IVR) approach has yet to be evaluated rigorously and quantitatively in a full power delivery system (PDS) setting. To fulfill this need, we present a system-level modeling and design space exploration framework called Ivory for IVR-assisted power delivery systems. Using a novel modeling methodology, it can accurately estimate power delivery efficiency, static performance characteristics, and dynamic transient responses under different load variations and external voltage/frequency scaling conditions. We validate the model over a wide range of IVR topologies with silicon measurement and SPICE simulation. Finally, we present two case studies using architecture-level performance and power simulators. The first case study focuses on optimal PDS design for multi-core systems, which achieves 8.6% power efficiency improvement over conventional off-chip voltage regulator module– (VRM) based PDS. The second case study explores the design tradeoffs for IVR-assisted PDSs in CPU and GPU systems with fast per-core dynamic voltage and frequency scaling (DVFS). We find 2 μs to be the optimal DVFS timescale, which not only reaps energy benefits (12.5% improvement in CPU and 50.0% improvement in GPU) but also avoids costly IVR overheads.

Effects of Continuous vs Discrete Frequency Scaling and Core Allocation on Energy Efficiency of Static Schedules for Moldable Tasks

Models for energy-efficient static scheduling of parallelizable tasks with deadlines on frequency-scalable parallel machines comprise moldable vs. malleable tasks and continuous vs. discrete frequency levels, plus preemptive vs. non-preemptive task execution with or without task migration. We investigate the tradeoff between scheduling time and energy efficiency when going from continuous to discrete core allocation and frequency levels on a multicore processor, and from preemptive to non-preemptive task execution. To this end, we present a tool to convert a schedule computed for malleable tasks on machines with continuous frequency scaling [Sanders and Speck, Euro-Par (2012)] into one for moldable tasks on a machine with discrete frequency levels. We compare the energy efficiency of the converted schedule to the energy consumed by a schedule produced by the integrated crown scheduler [Melot et al., ACM TACO (2015)] for moldable tasks and a machine with discrete frequency levels. Our experiments with synthetic and application-based task sets indicate that the converted Sanders Speck schedules, while computed faster, consume more energy on average than crown schedules. Surprisingly, it is not the step from malleable to moldable tasks that is responsible but the step from continuous to discrete frequency levels. One-time frequency scaling during a task’s execution can compensate for most of the energy overhead caused by frequency discretization.

Control inteligente mediante escalado dinámico voltaje-frecuencia (DVFS) de la temperatura en procesadores embebidos

<p>El aumento de la capacidad de cálculo de los procesadores embebidos ha generado una revolución en numerosos dominios de aplicación como la computación móvil o la robótica. La disipación del consumo producido por estos cálculos en una superficie tan pequeña hace que la disipación de energía suponga un problema de primer orden. Por un lado, no es posible aplicar técnicas de disipación activas y, por otro, las exigencias de diseño impiden una correcta disipación pasiva. Para resolver este problema, este trabajo presenta una metodología de control para el mantenimiento de una temperatura bajo control mediante el uso de escalado dinámico de la frecuencia del procesador (DVFS, Dynamic Voltage Frequency Scaling). La solución incluye un esquema de control de temperatura basado en realimentación junto con un supervisor que ajusta los parámetros del controlador en base al tipo de carga del trabajo. La estrategia de control propuesta se ha implementado tanto en espacio de usuario como driver dentro del kernel de Linux. Los experimentos realizados en una plataforma real demuestran que, comparado con el control existente en la actualidad, nuestra propuesta es capaz de gestionar la temperatura del procesador con más precisión, manteniendo niveles similares de eficiencia en la ejecución de benchmarks conocidos.</p>