Current source model of combinational logic gates for accurate gate-level circuit analysis and timing analysis
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2019 ◽
Vol 7
(12)
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pp. 3522-3528
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2017 ◽
Vol 32
(2)
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pp. 812-821
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2012 ◽
Vol 253-255
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pp. 679-683
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2013 ◽
Vol 310
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pp. 494-497
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