VLSI Design, Automation and Test(VLSI-DAT)
Latest Publications

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Published By IEEE

9781479962754

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A 60-dB DR PGA with DC-offset calibration for short-distance wireless receiver

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114572 ◽

2015 ◽

Cited By ~ 1

Author(s):

Xiaokun Zhao ◽

Zheng Song ◽

Baoyong Chi

Keyword(s):

Short Distance ◽

Wireless Receiver ◽

Dc Offset ◽

Dc Offset Calibration

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Efficient highly-parallel turbo decoder for 3GPP LTE-Advanced

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114513 ◽

2015 ◽

Cited By ~ 2

Author(s):

Jing-Shiun Lin ◽

Ming-Der Shieh ◽

Chung-Yen Liu ◽

Der-Wei Yang

Keyword(s):

Turbo Decoder ◽

3Gpp Lte ◽

Lte Advanced

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Constraints and design approaches in analog ICs forlmplantable medical devices

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114545 ◽

2015 ◽

Author(s):

Fernando Silveira ◽

Julian Oreggioni ◽

Pablo Castro-Lisboa

Keyword(s):

Medical Devices

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Low-power gated clock tree optimization for three-dimensional integrated circuits

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114530 ◽

2015 ◽

Cited By ~ 1

Author(s):

Yu-Chuan Chen ◽

Chih-Cheng Hsu ◽

Mark Po-Hung Lin

Keyword(s):

Integrated Circuits ◽

Low Power ◽

Three Dimensional ◽

Clock Tree ◽

Tree Optimization ◽

Gated Clock

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Lifetime-aware LRU promotion policy for last-level cache

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114579 ◽

2015 ◽

Cited By ~ 1

Author(s):

Hong-Yi Wu ◽

Chien-Chih Chen ◽

Hsiang-Jen Tsai ◽

Yin-Chi Peng ◽

Tien-Fu Chen

Keyword(s):

Promotion Policy

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A power-efficient circuit design of feed-forward FxLMS active noise cancellation for in-ear headphones

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114524 ◽

2015 ◽

Cited By ~ 6

Author(s):

Hong-Son Vu ◽

Kuan-Hung Chen ◽

Shih-Feng Sun ◽

Tien-Mau Fong ◽

Che-Wei Hsu ◽

...

Keyword(s):

Circuit Design ◽

Noise Cancellation ◽

Feed Forward ◽

Power Efficient ◽

Active Noise Cancellation ◽

Active Noise

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Design and VLSI implementation of novel pre-screening and simplified sorting based K-best detection for MIMO systems

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114511 ◽

2015 ◽

Cited By ~ 1

Author(s):

Jheng-Jhan He ◽

Chih-Peng Fan

Keyword(s):

Mimo Systems ◽

Vlsi Implementation

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Active ESD protection for input transistors in a 40-nm CMOS process

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114533 ◽

2015 ◽

Cited By ~ 4

Author(s):

Federico A. Altolaguirre ◽

Ming-Dou Ker

Keyword(s):

Cmos Process ◽

Esd Protection

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Trinocular adaptive window size disparity estimation algorithm and its real-time hardware

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114525 ◽

2015 ◽

Cited By ~ 7

Author(s):

Abdulkadir Akin ◽

Raffaele Capoccia ◽

Jonathan Narinx ◽

Ipek Baz ◽

Alexandre Schmid ◽

...

Keyword(s):

Real Time ◽

Window Size ◽

Estimation Algorithm ◽

Disparity Estimation ◽

Adaptive Window ◽

Size Disparity

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Circuit and system design for robotic flying vehicles

VLSI Design, Automation and Test(VLSI-DAT) ◽

10.1109/vlsi-dat.2015.7114557 ◽

2015 ◽

Author(s):

David M. Brooks

Keyword(s):

System Design ◽

Circuit And System

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VLSI Design, Automation and Test(VLSI-DAT)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A 60-dB DR PGA with DC-offset calibration for short-distance wireless receiver

Efficient highly-parallel turbo decoder for 3GPP LTE-Advanced

Constraints and design approaches in analog ICs forlmplantable medical devices

Low-power gated clock tree optimization for three-dimensional integrated circuits

Lifetime-aware LRU promotion policy for last-level cache

A power-efficient circuit design of feed-forward FxLMS active noise cancellation for in-ear headphones

Design and VLSI implementation of novel pre-screening and simplified sorting based K-best detection for MIMO systems

Active ESD protection for input transistors in a 40-nm CMOS process

Trinocular adaptive window size disparity estimation algorithm and its real-time hardware

Circuit and system design for robotic flying vehicles

VLSI Design, Automation and Test(VLSI-DAT)
Latest Publications