Techniques for verifying superscalar microprocessors

2002 ◽

Cited By ~ 2

Author(s):

R. Moreno ◽

L. Pinuel ◽

S. del Pino ◽

F. Tirado

Keyword(s):

Superscalar Microprocessors

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Decoding unit with high issue rate for x86 superscalar microprocessors

Proceedings 1998 International Conference on Parallel and Distributed Systems (Cat. No.98TB100250) ◽

10.1109/icpads.1998.741119 ◽

2002 ◽

Cited By ~ 1

Author(s):

Shin-Ki Cheng ◽

R-Ming Shiu ◽

Jyh-Jian Shann

Keyword(s):

Superscalar Microprocessors

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Increasing cache port efficiency for dynamic superscalar microprocessors

Proceedings of the 23rd annual international symposium on Computer architecture - ISCA '96 ◽

10.1145/232973.232989 ◽

1996 ◽

Cited By ~ 29

Author(s):

Kenneth M. Wilson ◽

Kunle Olukotun ◽

Mendel Rosenblum

Keyword(s):

Port Efficiency ◽

Superscalar Microprocessors

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Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) ◽

10.1109/lpe.2000.876791 ◽

2002 ◽

Cited By ~ 3

Author(s):

K. Ghose

Keyword(s):

Energy Requirements ◽

Superscalar Microprocessors ◽

Reducing Energy

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An algebraic model of correctness for superscalar microprocessors

Formal Methods in Computer-Aided Design - Lecture Notes in Computer Science ◽

10.1007/bfb0031820 ◽

1996 ◽

pp. 346-361 ◽

Cited By ~ 3

Author(s):

Anthony C. J. Fox ◽

Neal A. Harman

Keyword(s):

Algebraic Model ◽

Superscalar Microprocessors

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Automatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors

Tools and Algorithms for the Construction and Analysis of Systems - Lecture Notes in Computer Science ◽

10.1007/3-540-45319-9_18 ◽

2001 ◽

pp. 252-267 ◽

Cited By ~ 9

Author(s):

Miroslav N. Velev

Keyword(s):

Formal Verification ◽

Automatic Abstraction ◽

Superscalar Microprocessors

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Banked multiported register files for high-frequency superscalar microprocessors

30th Annual International Symposium on Computer Architecture, 2003. Proceedings. ◽

10.1145/859618.859627 ◽

2003 ◽

Cited By ~ 59

Author(s):

Jessica H. Tseng ◽

Krste Asanović

Keyword(s):

High Frequency ◽

Register Files ◽

Superscalar Microprocessors

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Dynamic register file partitioning in superscalar microprocessors for energy efficiency

2010 IEEE International Conference on Computer Design ◽

10.1109/iccd.2010.5647631 ◽

2010 ◽

Author(s):

Meltem Ozsoy ◽

Y. Onur Kocberber ◽

Mehmet Kayaalp ◽

Oguz Ergin

Keyword(s):

Energy Efficiency ◽

Register File ◽

Superscalar Microprocessors

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Functional Unit Selection in Superscalar Microprocessors for Low Power

TENCON 2006 - 2006 IEEE Region 10 Conference ◽

10.1109/tencon.2006.343984 ◽

2006 ◽

Author(s):

Pan Yan ◽

Tay Teng Tiow

Keyword(s):

Low Power ◽

Functional Unit ◽

Unit Selection ◽

Superscalar Microprocessors

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Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors (poster session)

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) ◽

10.1145/344166.344604 ◽

2000 ◽

Cited By ~ 2

Author(s):

Kanad Ghose

Keyword(s):

Poster Session ◽

Energy Requirements ◽

Superscalar Microprocessors ◽

Reducing Energy

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Techniques for verifying superscalar microprocessors

A power perspective of value speculation for superscalar microprocessors

Decoding unit with high issue rate for x86 superscalar microprocessors

Increasing cache port efficiency for dynamic superscalar microprocessors

Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors

An algebraic model of correctness for superscalar microprocessors

Automatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors

Banked multiported register files for high-frequency superscalar microprocessors

Dynamic register file partitioning in superscalar microprocessors for energy efficiency

Functional Unit Selection in Superscalar Microprocessors for Low Power

Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors (poster session)

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