scholarly journals Integrated Vivaldi antennas, an enabling technology for optical wireless networks on chip

2018 ◽  
Author(s):  
Giovanna Calò ◽  
Gaetano Bellanca ◽  
Ali Emre Kaplan ◽  
Franco Fuschini ◽  
Marina Barbiroli ◽  
...  
Keyword(s):  
Wireless Networks ◽  
Optical Wireless ◽  
Enabling Technology ◽  
Networks On Chip ◽  
On Chip ◽  
Vivaldi Antennas

Ray Tracing Channel Modeling for Optical Wireless Networks On-Chip

2021 ◽  
Author(s):  
Franco Fuschini ◽  
Marina Barbiroli ◽  
Jacopo Nanni ◽  
Gaetano Bellanca ◽  
Velio Tralli ◽  
...  
Keyword(s):  
Wireless Networks ◽  
Ray Tracing ◽  
Channel Modeling ◽  
Optical Wireless ◽  
Networks On Chip ◽  
On Chip

scholarly journals Multi-Level Analysis of On-Chip Optical Wireless Links

2019 ◽  
Vol 10 (1) ◽  
pp. 196 ◽  
Author(s):  
Franco Fuschini ◽  
Marina Barbiroli ◽  
Giovanna Calò ◽  
Velio Tralli ◽  
Gaetano Bellanca ◽  
...  
Keyword(s):  
Data Rate ◽  
Optical Wireless ◽  
Networks On Chip ◽  
Alternative Technologies ◽  
Interference Level ◽  
Radiation Properties ◽  
Promising Solution ◽  
Multi Level ◽  
On Chip ◽  
Final System

Networks-on-chip are being regarded as a promising solution to meet the on-going requirement for higher and higher computation capacity. In view of future kilo-cores architectures, electrical wired connections are likely to become inefficient and alternative technologies are being widely investigated. Wireless communications on chip may be therefore leveraged to overcome the bottleneck of physical interconnections. This work deals with wireless networks-on-chip at optical frequencies, which can simplify the network layout and reduce the communication latency, easing the antenna on-chip integration process at the same time. On the other end, optical wireless communication on-chip can be limited by the heavy propagation losses and the possible cross-link interference. Assessment of the optical wireless network in terms of bit error probability and maximum communication range is here investigated through a multi-level approach. Manifold aspects, concurring to the final system performance, are simultaneously taken into account, like the antenna radiation properties, the data-rate of the core-to core communication, the geometrical and electromagnetic layout of the chip and the noise and interference level. Simulations results suggest that communication up to some hundreds of μm can be pursued provided that the antenna design and/or the target data-rate are carefully tailored to the actual layout of the chip.

scholarly journals cm3WiNoCs: Congestion-Aware Millimeter-Wave Multichannel Wireless Networks-on-Chip

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 24098-24107
Author(s):  
Dedong Zhao ◽  
Yiming Ouyang ◽  
Qi Wang ◽  
Huaguo Liang
Keyword(s):  
Wireless Networks ◽  
Millimeter Wave ◽  
Networks On Chip ◽  
Multichannel Wireless Networks ◽  
On Chip ◽  
Congestion Aware

Evaluating the Feasibility of Wireless Networks-on-Chip Enabled by Graphene

2014 ◽  
Author(s):  
Sergi Abadal ◽  
Albert Mestres ◽  
Mario Iannazzo ◽  
Josep Solé-Pareta ◽  
Eduard Alarcón ◽  
...  
Keyword(s):  
Wireless Networks ◽  
Networks On Chip ◽  
On Chip

scholarly journals Avaliação de Desempenho de Redes-em-Chip Sem Fio Single-Hop com NAS Parallel Benchmarks

2013 ◽  
Author(s):  
Amanda Maria P. Amorim ◽  
Henrique C. Freitas
Keyword(s):  
Wireless Networks ◽  
Wide Band ◽  
Ultra Wide Band ◽  
Network Simulator ◽  
Networks On Chip ◽  
On Chip ◽  
Many Core

Em arquiteturas tradicionais de redes-em-chip, há influência do fio que pode reduzir a escalabilidade, rendimento e eficiência. Redes-em-chip sem fio (Wireless Networks-on-Chip WiNoCs) são alternativas para fornecer comunicação entre núcleos de processadores many-core com alta largura de banda e baixo consumo de energia. Em aplicações paralelas há comunicações entre vários núcleos demandando um projeto de rede-em-chip eficiente. Portanto, o objetivo deste trabalho é projetar e avaliar uma arquitetura WiNoC single-hop usando cargas de trabalho paralelas. A metodologia é baseada em simulações através do simulador de rede NS-2 (Network Simulator) e aplicações do NAS Parallel Benchmarks (NPB). A arquitetura WiNoC é baseada na topologia mesh 2-D com tecnologia de rádio UWB (Ultra Wide Band). A transmissão entre núcleos é avaliada com base nas comunicações unicast (1:1 e N: 1) e broadcast (1: N e N: N). A arquitetura WiNoC Single-hop tem alto desempenho nas comunicação broadcast, alcançando no máximo 2,21 % de perda de pacotes. Nas comunicações unicast, a WiNoC single-hop tem alto desempenho atingindo no máximo 0,02 % de perda de pacotes e 0,2 ms de latência. A maior taxa de perda de pacotes e latência ocorrem nas comunicações N:1, devido a concorrência dos pacotes pelo nó destino. A WiNoC Single-hop alcançou até 63,12 J de consumo de energia. É possível concluir que a arquitetura WiNoC Single-hop apresenta alto desempenho, mas precisa de melhorias para reduzir o consumo de energia aumentando a sua eficiência.

A fault-tolerant and congestion-aware architecture for wireless networks-on-chip

2019 ◽  
Vol 25 (6) ◽  
pp. 3675-3687 ◽  
Author(s):  
Seyed Hassan Mortazavi ◽  
Reza Akbar ◽  
Farshad Safaei ◽  
Amin Rezaei
Keyword(s):  
Wireless Networks ◽  
Fault Tolerant ◽  
Networks On Chip ◽  
On Chip ◽  
Congestion Aware
Sign in / Sign up

Export Citation Format

Share Document