Global resource sharing for synthesis of control data flow graphs on FPGAs

Proceedings of the 40th conference on Design automation - DAC '03 ◽

10.1145/775832.775985 ◽

2003 ◽

Author(s):

Seda Ogrenci Memik ◽

Gokhan Memik ◽

Roozbeh Jafari ◽

Eren Kursun

Keyword(s):

Resource Sharing ◽

Data Flow ◽

Control Data ◽

Data Flow Graphs ◽

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Global resource sharing for synthesis of control data flow graphs on FPGAs

10.1109/dac.2003.1219090 ◽

2004 ◽

Author(s):

S.O. Memik ◽

G. Memik ◽

R. Jafari ◽

E. Kursun

Keyword(s):

Resource Sharing ◽

Data Flow ◽

Control Data ◽

Data Flow Graphs ◽

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Scheduling conditional data-flow graphs with resource sharing

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516032 ◽

2002 ◽

Author(s):

J. Siddhiwala ◽

Liang-Fang Chao

Keyword(s):

Resource Sharing ◽

Data Flow ◽

Data Flow Graphs ◽

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Accelerated SAT-based scheduling of control/data flow graphs

Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors ◽

10.1109/iccd.2002.1106801 ◽

2003 ◽

Author(s):

S.O. Memik ◽

F. Fallah

Keyword(s):

Data Flow ◽

Control Data ◽

Data Flow Graphs ◽

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Dynamic template generation for resource sharing in control and data flow graphs

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) ◽

10.1109/vlsid.2006.75 ◽

2006 ◽

Author(s):

D.C. Zaretsky ◽

G. Mittal ◽

R.P. Dick ◽

P. Banerjee

Keyword(s):

Resource Sharing ◽

Data Flow ◽

Data Flow Graphs ◽

Dynamic Template ◽

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Low cost fault tolerance against k c -cycle and k m -unit transient for loop based control data flow graphs during physically aware high level synthesis

Microelectronics Reliability ◽

10.1016/j.microrel.2017.05.023 ◽

2017 ◽

Vol 74 ◽

pp. 88-99 ◽

Author(s):

Anirban Sengupta ◽

Deepak Kachave

Keyword(s):

Fault Tolerance ◽

Data Flow ◽

Low Cost ◽

High Level Synthesis ◽

Control Data ◽

C Cycle ◽

Data Flow Graphs ◽

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Exploration of k c ‐cycle transient fault‐secured datapath and loop unrolling factor for control data flow graphs during high‐level synthesis

Electronics Letters ◽

10.1049/el.2014.4393 ◽

2015 ◽

Vol 51 (7) ◽

pp. 562-564 ◽

Author(s):

A. Sengupta

Keyword(s):

Data Flow ◽

High Level Synthesis ◽

Control Data ◽

Transient Fault ◽

Loop Unrolling ◽

C Cycle ◽

Data Flow Graphs ◽

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Intellectual property core protection of control data flow graphs using robust watermarking during behavioural synthesis based on user resource constraint and loop unrolling factor

Electronics Letters ◽

10.1049/el.2015.3879 ◽

2016 ◽

Vol 52 (6) ◽

pp. 439-441 ◽

Author(s):

A. Sengupta ◽

S. Bhadauria

Keyword(s):

Intellectual Property ◽

Data Flow ◽

Resource Constraint ◽

Robust Watermarking ◽

Control Data ◽

Loop Unrolling ◽

Data Flow Graphs ◽

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Low cost optimized Trojan secured schedule at behavioral level for single & Nested loop control data flow graphs (Invited Paper)

Integration ◽

10.1016/j.vlsi.2016.09.007 ◽

2017 ◽

Vol 58 ◽

pp. 378-389 ◽

Author(s):

Anirban Sengupta ◽

Dipanjan Roy ◽

Saumya Bhadauria

Keyword(s):

Data Flow ◽

Low Cost ◽

Control Data ◽

Loop Control ◽

Behavioral Level ◽

Data Flow Graphs ◽

Flow Graphs ◽

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Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs

IEICE Transactions on Information and Systems ◽

10.1093/ietisy/e90-d.12.1956 ◽

2007 ◽

Vol E90-D (12) ◽

pp. 1956-1966 ◽

Author(s):

F. MEHDIPOUR ◽

H. NOORI ◽

M. SAHEB ZAMANI ◽

K. INOUE ◽

K. MURAKAMI

Keyword(s):

Energy Saving ◽

Data Flow ◽

Control Data ◽

Reconfigurable Processor ◽

Data Flow Graphs ◽

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Handling Control Data Flow Graphs for a Tightly Coupled Reconfigurable Accelerator

Embedded Software and Systems - Lecture Notes in Computer Science ◽

10.1007/978-3-540-72685-2_24 ◽

2007 ◽

pp. 249-260

Author(s):

Hamid Noori ◽

Farhad Mehdipour ◽

Morteza Saheb Zamani ◽

Koji Inoue ◽

Kazuaki Murakami

Keyword(s):

Data Flow ◽

Control Data ◽

Tightly Coupled ◽

Data Flow Graphs ◽

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