Embedding optical camera communication (OCC) commercially as a favorable complement of radio-frequency technology has led to the desire for an intelligent receiver system that is eligible to communicate with an accurate light-emitting diode (LED) transmitter. To shed light on this issue, a novel scheme for detecting and recognizing data transmitting LEDs has been elucidated in this paper. Since the optically modulated signal is captured wirelessly by a camera that plays the role of the receiver for the OCC technology, the process to detect LED region and retrieval of exact information from the image sensor is required to be intelligent enough to achieve a low bit error rate (BER) and high data rate to ensure reliable optical communication within limited computational abilities of the most used commercial cameras such as those in smartphones, vehicles, and mobile robots. In the proposed scheme, we have designed an intelligent camera receiver system that is capable of separating accurate data transmitting LED regions removing other unwanted LED regions employing a support vector machine (SVM) classifier along with a convolutional neural network (CNN) in the camera receiver. CNN is used to detect every LED region from the image frame and then essential features are extracted to feed into an SVM classifier for further accurate classification. The receiver operating characteristic curve and other key performance parameters of the classifier have been analyzed broadly to evaluate the performance, justify the assistance of the SVM classifier in recognizing the accurate LED region, and decode data with low BER. To investigate communication performances, BER analysis, data rate, and inter-symbol interference have been elaborately demonstrated for the proposed intelligent receiver. In addition, BER against distance and BER against data rate have also been exhibited to validate the effectiveness of our proposed scheme comparing with only CNN and only SVM classifier based receivers individually. Experimental results have ensured the robustness and applicability of the proposed scheme both in the static and mobile scenarios.
VHDL Design and FPGA Implementation of a High Data Rate Turbo Decoder based on Majority Logic Codes
