Power Hardware-in-the-loop Simulation of a Gas Engine Cogeneration System for Developing a Power Converter System

2010 ◽  
Vol 130 (5) ◽  
pp. 646-654 ◽  
Author(s):  
Miao Hong ◽  
Satoshi Horie ◽  
Yushi Miura ◽  
Tosifumi Ise ◽  
Yuki Sato ◽  
...  
1993 ◽  
Vol 59 (559) ◽  
pp. 807-813
Author(s):  
Koichi Ito ◽  
Ryohei Yokoyama ◽  
Takashi Shiba ◽  
Hidekazu Hayashi

2005 ◽  
Vol 2005.3 (0) ◽  
pp. 315-316
Author(s):  
Yuji KAWABATA ◽  
Shinji Takara ◽  
Jiro SENDA ◽  
Mamoru SENDA

1995 ◽  
Author(s):  
Tomoaki Imamura ◽  
Tsugunori Hata ◽  
Tatsutoshi Umeda ◽  
Hirotaka Nakajima

Electronics ◽  
2021 ◽  
Vol 10 (7) ◽  
pp. 801
Author(s):  
Wei Jiang ◽  
Linfeng Sun ◽  
Yan Chen ◽  
Haining Ma ◽  
Seiji Hashimoto

This paper proposes a low-cost on-chip Hardware-in-the-Loop (HIL) platform for teaching and fast prototyping of dynamic systems. A dual-core digital signal controller (DSC)-based solution is proposed for the HIL system. CPU core A, as the simulation engine, is dedicated to circuit and system simulation. The actuation and control logic are implemented in CPU core B, which is working as the control engine. Inter-processor communication is used to interchange variables between the CPUs. The digital-to-analog converter and digital outputs are used to send the duty cycle and system state variables to the oscilloscope for users’ visual feedback. Two typical systems with fast and slow dynamics are modeled and implemented in the simulation engine. Under the excitation generated by the control engine, system dynamics can be observed for studying purposes. Close-loop control for a buck converter is also demonstrated on the developed prototype, where both input voltage and load variations performance are tested. The test results indicate that the digital simulator can well emulate the average small signal model of a power converter in open-loop and close-loop scenario. Meanwhile, the control parameters can be modified for system performance evaluation and education purposes. The proposed low-cost HIL system can be easily applied to the engineering teaching as well as fast prototype development phase of product design.


Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 81 ◽  
Author(s):  
Alberto Sanchez ◽  
Angel de Castro ◽  
Maria Sofía Martínez-García ◽  
Javier Garrido

One of the main decisions when making a digital design is which arithmetic is going to be used. The arithmetic determines the hardware resources needed and the latency of every operation. This is especially important in real-time applications like HIL (Hardware-in-the-loop), where a real-time simulation of a plant—power converter, mechanical system, or any other complex system—is accomplished. While a fixed-point gets optimal implementations, using considerably fewer resources and allowing smaller simulation steps, its use is very restricted to very specific applications, as its design effort is quite high. On the other side, IEEE-754 floating-point may have resolution problems in case of the 32-bit version, and excessive hardware usage in case of the 64-bit version. This paper presents LOCOFloat, a low-cost floating-point format designed for FPGA applications. Its key features are soft normalization of the results, using significand and exponent fields in two’s complement. This paper shows the implementation of addition, subtraction and multiplication of the proposed format. Both IEEE-754 versions and LOCOFloat are compared in this paper, implementing a HIL model of a buck converter. Although the application example is a HIL simulator, other applications could take benefit from the proposed format. Results show that LOCOFloat is as accurate as 64-bit floating-point, while reducing the use of DSPs blocks by 84 % .


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