scholarly journals A Hardware-in-the-Loop-on-Chip Development System for Teaching and Development of Dynamic Systems

Electronics ◽  
2021 ◽  
Vol 10 (7) ◽  
pp. 801
Author(s):  
Wei Jiang ◽  
Linfeng Sun ◽  
Yan Chen ◽  
Haining Ma ◽  
Seiji Hashimoto

This paper proposes a low-cost on-chip Hardware-in-the-Loop (HIL) platform for teaching and fast prototyping of dynamic systems. A dual-core digital signal controller (DSC)-based solution is proposed for the HIL system. CPU core A, as the simulation engine, is dedicated to circuit and system simulation. The actuation and control logic are implemented in CPU core B, which is working as the control engine. Inter-processor communication is used to interchange variables between the CPUs. The digital-to-analog converter and digital outputs are used to send the duty cycle and system state variables to the oscilloscope for users’ visual feedback. Two typical systems with fast and slow dynamics are modeled and implemented in the simulation engine. Under the excitation generated by the control engine, system dynamics can be observed for studying purposes. Close-loop control for a buck converter is also demonstrated on the developed prototype, where both input voltage and load variations performance are tested. The test results indicate that the digital simulator can well emulate the average small signal model of a power converter in open-loop and close-loop scenario. Meanwhile, the control parameters can be modified for system performance evaluation and education purposes. The proposed low-cost HIL system can be easily applied to the engineering teaching as well as fast prototype development phase of product design.


Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 81 ◽  
Author(s):  
Alberto Sanchez ◽  
Angel de Castro ◽  
Maria Sofía Martínez-García ◽  
Javier Garrido

One of the main decisions when making a digital design is which arithmetic is going to be used. The arithmetic determines the hardware resources needed and the latency of every operation. This is especially important in real-time applications like HIL (Hardware-in-the-loop), where a real-time simulation of a plant—power converter, mechanical system, or any other complex system—is accomplished. While a fixed-point gets optimal implementations, using considerably fewer resources and allowing smaller simulation steps, its use is very restricted to very specific applications, as its design effort is quite high. On the other side, IEEE-754 floating-point may have resolution problems in case of the 32-bit version, and excessive hardware usage in case of the 64-bit version. This paper presents LOCOFloat, a low-cost floating-point format designed for FPGA applications. Its key features are soft normalization of the results, using significand and exponent fields in two’s complement. This paper shows the implementation of addition, subtraction and multiplication of the proposed format. Both IEEE-754 versions and LOCOFloat are compared in this paper, implementing a HIL model of a buck converter. Although the application example is a HIL simulator, other applications could take benefit from the proposed format. Results show that LOCOFloat is as accurate as 64-bit floating-point, while reducing the use of DSPs blocks by 84 % .



Energies ◽  
2020 ◽  
Vol 13 (2) ◽  
pp. 373 ◽  
Author(s):  
Leonel Estrada ◽  
Nimrod Vázquez ◽  
Joaquín Vaquero ◽  
Ángel de Castro ◽  
Jaime Arau

Nowadays, the use of the hardware in the loop (HIL) simulation has gained popularity among researchers all over the world. One of its main applications is the simulation of power electronics converters. However, the equipment designed for this purpose is difficult to acquire for some universities or research centers, so ad-hoc solutions for the implementation of HIL simulation in low-cost hardware for power electronics converters is a novel research topic. However, the information regarding implementation is written at a high technical level and in a specific language that is not easy for non-expert users to understand. In this paper, a systematic methodology using LabVIEW software (LabVIEW 2018) for HIL simulation is shown. A fast and easy implementation of power converter topologies is obtained by means of the differential equations that define each state of the power converter. Five simple steps are considered: designing the converter, modeling the converter, solving the model using a numerical method, programming an off-line simulation of the model using fixed-point representation, and implementing the solution of the model in a Field-Programmable Gate Array (FPGA). This methodology is intended for people with no experience in the use of languages as Very High-Speed Integrated Circuit Hardware Description Language (VHDL) for Real-Time Simulation (RTS) and HIL simulation. In order to prove the methodology’s effectiveness and easiness, two converters were simulated—a buck converter and a three-phase Voltage Source Inverter (VSI)—and compared with the simulation of commercial software (PSIM® v9.0) and a real power converter.





Author(s):  
Abdelouahab D. Benhamadouche ◽  
Farid Djahli ◽  
Adel Ballouti ◽  
Abdeslem Sahli

In this paper, we present a new approach for complex system design, which allows rapid, efficient and low-cost prototyping. This approach can simplify designing tasks and go faster from system modeling to effective hardware implementation. Designing multi-domain systems requires different engineering competences and several tools, our approach gives a unique design environment, based on the use of VHDL-AMS modeling language and FPGA device within the same design tool. This approach is intended to enhance hardware-in-the-loop (HIL) practices with a more realistic simulation which improve the verification process in the system design flow. This paper describes the implementation of a software/hardware platform as a practical support for our approach, the feasibility and the benefits of this approach are demonstrated through a practical case study for power converter control. The obtained results show that the developed method achieves significant speed-up compared with conventional simulation, with a minimum used resources and minimum latency.



2010 ◽  
Vol 130 (5) ◽  
pp. 646-654 ◽  
Author(s):  
Miao Hong ◽  
Satoshi Horie ◽  
Yushi Miura ◽  
Tosifumi Ise ◽  
Yuki Sato ◽  
...  


Sensors ◽  
2019 ◽  
Vol 19 (5) ◽  
pp. 1178 ◽  
Author(s):  
Jorge Prada ◽  
Christina Cordes ◽  
Carsten Harms ◽  
Walter Lang

This contribution outlines the design and manufacturing of a microfluidic device implemented as a biosensor for retrieval and detection of bacteria RNA. The device is fully made of Cyclo-Olefin Copolymer (COC), which features low auto-fluorescence, biocompatibility and manufacturability by hot-embossing. The RNA retrieval was carried on after bacteria heat-lysis by an on-chip micro-heater, whose function was characterized at different working parameters. Carbon resistive temperature sensors were tested, characterized and printed on the biochip sealing film to monitor the heating process. Off-chip and on-chip processed RNA were hybridized with capture probes on the reaction chamber surface and identification was achieved by detection of fluorescence tags. The application of the mentioned techniques and materials proved to allow the development of low-cost, disposable albeit multi-functional microfluidic system, performing heating, temperature sensing and chemical reaction processes in the same device. By proving its effectiveness, this device contributes a reference to show the integration potential of fully thermoplastic devices in biosensor systems.



Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 958
Author(s):  
Maosheng Zhang ◽  
Yu Bai ◽  
Shu Yang ◽  
Kuang Sheng

With the increasing integration density of power control unit (PCU) modules, more functional power converter units are integrated into a single module for applications in electric vehicles or hybrid electric vehicles (EVs/HEVs). Different types of power dies with different footprints are usually placed closely together. Due to the constraints from the placement of power dies and liquid cooling schemes, heat-flow paths from the junction to coolant are possibly inconsistent for power dies, resulting in different thermal resistance and capacitance (RC) characteristics of power dies. This presents a critical challenge for optimal liquid cooling at a low cost. In this paper, a highly integrated PCU module is developed for application in EVs/HEVs. The underlying mechanism of the inconsistent RC characteristics of power dies for the developed PCU module is revealed by experiments and simulations. It is found that the matching placement design of power dies with a heat sink structure and liquid cooler, as well as a liquid cooling scheme, can alleviate the inconsistent RC characteristics of power dies in highly integrated PCU modules. The findings in this paper provide valuable guidance for the design of highly integrated PCU modules.



Energies ◽  
2021 ◽  
Vol 14 (15) ◽  
pp. 4650
Author(s):  
Martha N. Acosta ◽  
Francisco Gonzalez-Longatt ◽  
Juan Manuel Roldan-Fernandez ◽  
Manuel Burgos-Payan

The massive integration of variable renewable energy (VRE) in modern power systems is imposing several challenges; one of them is the increased need for balancing services. Coping with the high variability of the future generation mix with incredible high shares of VER, the power system requires developing and enabling sources of flexibility. This paper proposes and demonstrates a single layer control system for coordinating the steady-state operation of battery energy storage system (BESS) and wind power plants via multi-terminal high voltage direct current (HVDC). The proposed coordinated controller is a single layer controller on the top of the power converter-based technologies. Specifically, the coordinated controller uses the capabilities of the distributed battery energy storage systems (BESS) to store electricity when a logic function is fulfilled. The proposed approach has been implemented considering a control logic based on the power flow in the DC undersea cables and coordinated to charging distributed-BESS assets. The implemented coordinated controller has been tested using numerical simulations in a modified version of the classical IEEE 14-bus test system, including tree-HVDC converter stations. A 24-h (1-min resolution) quasi-dynamic simulation was used to demonstrate the suitability of the proposed coordinated control. The controller demonstrated the capacity of fulfilling the defined control logic. Finally, the instantaneous flexibility power was calculated, demonstrating the suitability of the proposed coordinated controller to provide flexibility and decreased requirements for balancing power.



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