AUTO ENCODERS BASED NEURAL NETWORKS TO PREDICT FAULTINESS OF VLSI CIRCUITS

2020 ◽  
Vol 8 (1) ◽  
pp. 1
Author(s):  
R. GURUNADHA ◽  
K. BABULU ◽  
◽  
Keyword(s):  
Neural Networks ◽  
Vlsi Circuits

Test Pattern Generation of VLSI Circuits Using Hopfield Neural Networks

2010 ◽  
Vol 29-32 ◽  
pp. 1034-1039
Author(s):  
Zhong Liang Pan ◽  
Ling Chen ◽  
Guang Zhao Zhang
Keyword(s):  
Neural Networks ◽  
Simulated Annealing ◽  
Energy Function ◽  
Digital Circuits ◽  
Test Pattern ◽  
Pattern Generation ◽  
Vlsi Circuits ◽  
Hopfield Neural Networks ◽  
Test Pattern Generation ◽  
Chaotic Simulated Annealing

A new test pattern generation method for the stuck-at faults in VLSI circuits is presented in this paper, the method uses Hopfield neural networks and chaotic simulated annealing. The Hopfield neural network corresponding to a digital circuit is built, the test patterns of faults in digital circuits are produced by computing the optima of the energy function. A chaotic simulated annealing algorithm is designed, which combines the features of chaotic systems and conventional simulated annealing, it is able to take the advantages of the stochastic properties and global search ability of chaotic system. The algorithm is used to compute the optima of the energy function of neural networks in order to produce the test patterns of faults. Experimental results show that the test pattern generation method proposed in this paper can produce the test patterns in short time for both single stuck-at faults and multiple stuck-at faults in digital circuits.

scholarly journals Synaptic Dynamics in Analog VLSI

2007 ◽  
Vol 19 (10) ◽  
pp. 2581-2603 ◽  
Author(s):  
Chiara Bartolozzi ◽  
Giacomo Indiveri
Keyword(s):  
Neural Networks ◽  
Information Transfer ◽  
Theoretical Models ◽  
Analog Vlsi ◽  
Vlsi Circuits ◽  
Neural Systems ◽  
Hardware Implementations ◽  
Wide Range ◽  
Synaptic Dynamics ◽  
Experimental Findings

Synapses are crucial elements for computation and information transfer in both real and artificial neural systems. Recent experimental findings and theoretical models of pulse-based neural networks suggest that synaptic dynamics can play a crucial role for learning neural codes and encoding spatiotemporal spike patterns. Within the context of hardware implementations of pulse-based neural networks, several analog VLSI circuits modeling synaptic functionality have been proposed. We present an overview of previously proposed circuits and describe a novel analog VLSI synaptic circuit suitable for integration in large VLSI spike-based neural systems. The circuit proposed is based on a computational model that fits the real postsynaptic currents with exponentials. We present experimental data showing how the circuit exhibits realistic dynamics and show how it can be connected to additional modules for implementing a wide range of synaptic properties.

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