A Design of VB-DDC Using DA-Based Systolic FIR Filter
2011 ◽
Vol 130-134
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pp. 3950-3953
Keyword(s):
In this paper, we present yet another design of the variable-bandwidth digital down-converter (VB-DDC). The shaping filter in the DDC architecture is substitute with a method which is implemented with fully pipelined computing structure of systolic decomposition for distributed arithmetic (DA) based FIR filer. The systolic structure of the FIR filter involves significantly less memory and complexity compared with the existing ones. The effectiveness of the design is validated by the proposed FPGA implementation results.
Keyword(s):
2014 ◽
Vol 92
(16)
◽
pp. 12-16
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2015 ◽
Vol 12
(22)
◽
pp. 20150702-20150702
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2015 ◽
Vol 5
(3)
◽
pp. 1-10
Keyword(s):
2015 ◽
Vol 11
(12)
◽
pp. 1404-1409
◽