Y2O3-based Memristive Crossbar Array for Synaptic Learning

Here, we report a fabrication of Y2O3-based memristive crossbar array along with an analytical model to evaluate the performance of such memristive array system to understand the forgetting and retention behavior in the neuromorphic computation. The developed analytical model is able to simulate the highly-dense memristive crossbar array based neural network of biological synapses. These biological synapses control the communication efficiency between neurons and can implement the learning capability of the neurons. During electrical stimulation of the memristive devices, the memory transition is exhibited along with the number of applied voltage pulses which is analogous to the real human brain functionality. Further, to obtain the forgetting and retention behavior of the memristive devices, a modified window function equation is proposed by incorporating two novel internal state variables in the form of forgetting rate and retention. The obtained results confirm that the effect of variation in electrical stimuli on forgetting and retention as similar to the biological brain. Therefore, the developed analytical memristive model further can be utilized in the memristive system to develop real-world applications in neuromorphic domains.

Development of Compute-in-Memory Memristive Crossbar Architecture with Composite Memory Cells

In this chapter, we discuss the compute-in-memory memristive architectures and develop a 2M1M crossbar array which can be applied for both memory and logic applications. In the first section of this chapter, we briefly discuss compute-in-memory memristive architectural concepts and specifically investigate the current state off the art composite memristor-based switch cells. Also, we define their applications e.g. digital/analog logic, memory, etc. along with their drawbacks and implementation limitations. These composite cells can be designed to be adapted into different design needs can enhance the performance of the memristor crossbar array while preserving their advantages in terms of area and/or energy efficiency. In the second section of the chapter, we discuss a 2M1M memristor switch and its functionality which can be applied into memory crossbars and enables both memory and logic functions. In the next section of the chapter, we define logic implementation by using 2M1M cells and describe variety of in-memory digital logic 2M1M gates. In the next section of the chapter, 2M1M crossbar array performance to be utilized as memory platform is described and we conceived pure memristive 2M1M crossbar array maintains high density, energy efficiency and low read and write time in comparison with other state of art memory architectures. This chapter concluded that utilizing a composite memory cell based on non-volatile memristor devices allow a more efficient combination of processing and storage architectures (compute-in-memory) to overcome the memory wall problem and enhance the computational efficiency for beyond Von-Neumann computing platforms.