Digital System Design for Quantum Error Correction Codes

Quantum computing is a computer development technology that uses quantum mechanics to perform the operations of data and information. It is an advanced technology, yet the quantum channel is used to transmit the quantum information which is sensitive to the environment interaction. Quantum error correction is a hybrid between quantum mechanics and the classical theory of error-correcting codes that are concerned with the fundamental problem of communication, and/or information storage, in the presence of noise. The interruption made by the interaction makes transmission error during the quantum channel qubit. Hence, a quantum error correction code is needed to protect the qubit from errors that can be caused by decoherence and other quantum noise. In this paper, the digital system design of the quantum error correction code is discussed. Three designs used qubit codes, and nine-qubit codes were explained. The systems were designed and configured for encoding and decoding nine-qubit error correction codes. For comparison, a modified circuit is also designed by adding Hadamard gates.

Cost-optimal single-qubit gate synthesis in the Clifford hierarchy

For universal quantum computation, a major challenge to overcome for practical implementation is the large amount of resources required for fault-tolerant quantum information processing. An important aspect is implementing arbitrary unitary operators built from logical gates within the quantum error correction code. A synthesis algorithm can be used to approximate any unitary gate up to arbitrary precision by assembling sequences of logical gates chosen from a small set of universal gates that are fault-tolerantly performable while encoded in a quantum error-correction code. However, current procedures do not yet support individual assignment of base gate costs and many do not support extended sets of universal base gates. We analysed cost-optimal sequences using an exhaustive search based on Dijkstra’s pathfinding algorithm for the canonical Clifford+T set of base gates and compared them to when additionally including Z-rotations from higher orders of the Clifford hierarchy. Two approaches of assigning base gate costs were used. First, costs were reduced to T-counts by recursively applying a Z-rotation catalyst circuit. Second, costs were assigned as the average numbers of raw (i.e. physical level) magic states required to directly distil and implement the gates fault-tolerantly. We found that the average sequence cost decreases by up to 54±3% when using the Z-rotation catalyst circuit approach and by up to 33±2% when using the magic state distillation approach. In addition, we investigated observed limitations of certain assignments of base gate costs by developing an analytic model to estimate the proportion of sets of Z-rotation gates from higher orders of the Clifford hierarchy that are found within sequences approximating random target gates.