Digital System Design for Quantum Error Correction Codes

Quantum computing is a computer development technology that uses quantum mechanics to perform the operations of data and information. It is an advanced technology, yet the quantum channel is used to transmit the quantum information which is sensitive to the environment interaction. Quantum error correction is a hybrid between quantum mechanics and the classical theory of error-correcting codes that are concerned with the fundamental problem of communication, and/or information storage, in the presence of noise. The interruption made by the interaction makes transmission error during the quantum channel qubit. Hence, a quantum error correction code is needed to protect the qubit from errors that can be caused by decoherence and other quantum noise. In this paper, the digital system design of the quantum error correction code is discussed. Three designs used qubit codes, and nine-qubit codes were explained. The systems were designed and configured for encoding and decoding nine-qubit error correction codes. For comparison, a modified circuit is also designed by adding Hadamard gates.

Digital System Design for Traffic Light Controller System: A Systematic Approach

In this paper, we are going to present the finite state machine, how to implement it via hardware description language (HDL), and how to use it in a real application. At first, the specification and requirements of traffic light controller are stated. Then, the system architecture based on finite state machine (FSM) are conducted. Finally, the way of using HDL as well as the test-bench simulation are given in detail. Keywords : Digital system design, System on chip, Finite State Machine, Digital Design Education, Smart Classroom.

Linear Feedback Shift Register and its Applications in Digital System Design

In digital system design, the Linear Feedback Shift Register (LFSR) is the queen of logic functions, and the design engineers can use LFSR in both hardware (HW) or software (SW) implementation. In this paper, LFSR will be discussed in its HW implementation via Hardware description language. In addition, the application of LFSR in of pseudorandom number generator (PRNG), direct sequence spread spectrum (DSSS), cyclic redundancy check (CRC) is also given. Keywords-- Digital system design, System on chip, ASIC digital design, Linear feedback shift register

Robust and Energy-Efficient Hardware: The Case for Asynchronous Design

The current technologies behind the design of semiconductor integrated circuits allow embedding billions of components in a singe silicon die, enabling the construction of very complex circuits in a tiny space, dissipating little energy and producing huge amounts of useful computational work. However, the current levels of integration for electronic components in silicon and similar materials are not easily managed, as parameter variations grow steadily, making the design tasks increasingly challenging. Synchronous techniques have dominated the digital system design landscape for many decades, but their costs are increasingly hard to cope with. Asynchronous design and particularly quasi-delay insensitive design promises to deal with the same challenges more gracefully in current advanced nodes, and possibly irrevocably in future technology nodes. This article proposes a review of the state of the art in using asynchronous circuit design techniques to achieve energy-efficient and robust digital circuit and system design. In particular, the definition of a robust digital circuit comprises addressing several aspects to which a digital system design is expected to be robust to, including: (1) voltage variations; (2) process variations; (3) temperature variations; (4) circuit aging. Besides addressing energy-efficiency and all the mentioned robustness aspects, this work also approaches some of the state-of-the-art tools available to deal with asynchronous design, and points to desirable research development to be conducted in these subjects in the future.

Fast IQ Amplitude Approximation Method for ASIC Digital System

In some modules of digital systems, such as Fast Fourier Transform (FFT), Discrete Fourier transform (DFT), IQ (in-phase and quadrature components) modulation/ demodulation, the outputs use the complex data formed , and the calculation of its magnitude value √ are required. In software digital signal processing platform, the multiplication and square root operations are executed by using its math library; however, in Application specific integrated circuit (ASIC) digital system design, the implementation of those operators via Coordinate Rotation Digital Computer (CORDIC) algorithm requires the numerous resources and delays. So, in this paper, we present a fast approximation method for above problem which takes a small delay but acceptable accuracy for AISC digital system design. Keywords—ASIC, Digital system design, FFT, DFT, Fast amplitude approximation, Max-Min approximation.

Digital System Design

The main objective of this chapter is to study and design various combinational circuits like Verification of Boolean Expression, Multiplexer, Demultiplexer Circuits, Code Converters circuits using LabVIEW tools. This chapter will make the user more comfortable towards learning of Design of Digital Systems. The various types of Boolean Expressions like SOP and POS, Combinational circuits like Adder circuit (Half adder and full adder), Subtractor circuit (Half Subtractor, Full Subtractor), some code converters like Binary to Gray and Gray to Binary, BCD to Gray and Gray to BCD and also Sequential circuits with D flip flop is also being carried out using this LabVIEW.

Project-Based Learning and Evaluation in an Online Digital Design Course

This paper reports an experience of an abrupt shift from traditional teaching to distance learning within a course on digital system design using programmable logic platforms. The course organization and evaluation model had to be modified on the fly due to the COVID-19 pandemic. The adopted teaching and assessment methodology puts a strong focus on the laboratory component, assigning a very significant weight to project-based evaluation. As the access to laboratory equipment was cut, all the previously accumulated experience had to be modified and adapted to new circumstances. The paper discusses teaching methods employed within the course and analyzes in detail a project-based evaluation accentuated on modeling of a simplified processor. The advantages and drawbacks of the reported teaching methods are appointed. Possible design extensions are also suggested, which permit assigning the same core project to different students. We believe that the proposed project is a valuable instructional tool, in particular, for remote learning/assessment.