pipelined microprocessors Latest Research Papers

Machine learning for hardware security: Classifier-based identification of Trojans in pipelined microprocessors

Applied Soft Computing ◽

10.1016/j.asoc.2021.108068 ◽

2021 ◽

pp. 108068

Author(s):

Aleksa Damljanovic ◽

Annachiara Ruospo ◽

Ernesto Sanchez ◽

Giovanni Squillero

Keyword(s):

Machine Learning ◽

Hardware Security ◽

Pipelined Microprocessors

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Improving the efficiency of automated debugging of pipelined microprocessors by symmetry breaking in modular schemes for Boolean encoding of cardinality

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad.2014.7001425 ◽

2014 ◽

Author(s):

Miroslav N. Velev ◽

Ping Gao

Keyword(s):

Symmetry Breaking ◽

Automated Debugging ◽

Pipelined Microprocessors

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A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors

2013 8th IEEE Design and Test Symposium ◽

10.1109/idt.2013.6727120 ◽

2013 ◽

Cited By ~ 2

Author(s):

P. Bernardi ◽

D. Boyang ◽

L. Ciganda ◽

E. Sanchez ◽

M. Sonza Reorda ◽

...

Keyword(s):

Functional Test ◽

Test Algorithm ◽

Pipelined Microprocessors

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Efficiently tolerating timing violations in pipelined microprocessors

Proceedings of the 50th Annual Design Automation Conference on - DAC '13 ◽

10.1145/2463209.2488860 ◽

2013 ◽

Cited By ~ 9

Author(s):

Koushik Chakraborty ◽

Brennan Cozzens ◽

Sanghamitra Roy ◽

Dean M. Ancajas

Keyword(s):

Timing Violations ◽

Pipelined Microprocessors

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Automated debugging of counterexamples in formal verification of pipelined microprocessors

17th Asia and South Pacific Design Automation Conference ◽

10.1109/aspdac.2012.6165044 ◽

2012 ◽

Cited By ~ 6

Author(s):

Miroslav N. Velev ◽

Ping Gao

Keyword(s):

Formal Verification ◽

Automated Debugging ◽

Pipelined Microprocessors

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Automatic formal verification of multithreaded pipelined microprocessors

2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad.2011.6105403 ◽

2011 ◽

Cited By ~ 8

Author(s):

Miroslav N. Velev ◽

Ping Gao

Keyword(s):

Formal Verification ◽

Pipelined Microprocessors

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Method for Formal Verification of Soft-Error Tolerance Mechanisms in Pipelined Microprocessors

Formal Methods and Software Engineering - Lecture Notes in Computer Science ◽

10.1007/978-3-642-16901-4_24 ◽

2010 ◽

pp. 355-370 ◽

Cited By ~ 2

Author(s):

Miroslav N. Velev ◽

Ping Gao

Keyword(s):

Formal Verification ◽

Soft Error ◽

Error Tolerance ◽

Tolerance Mechanisms ◽

Pipelined Microprocessors

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Pipelined Microprocessors Optimization and Debugging

Lecture Notes in Computer Science - Reconfigurable Computing: Architectures, Tools and Applications ◽

10.1007/978-3-642-12133-3_45 ◽

2010 ◽

pp. 435-444 ◽

Cited By ~ 2

Author(s):

Bijan Alizadeh ◽

Amir Masoud Gharehbaghi ◽

Masahiro Fujita

Keyword(s):

Pipelined Microprocessors

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On-Line Instruction-Checking in Pipelined Microprocessors

2008 17th Asian Test Symposium ◽

10.1109/ats.2008.47 ◽

2008 ◽

Cited By ~ 5

Author(s):

Stefano Di Carlo ◽

Giorgio Di Natale ◽

Riccardo Mariani

Keyword(s):

On Line ◽

Pipelined Microprocessors

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Formal Verification of Pipelined Microprocessors with Delayed Branches

7th International Symposium on Quality Electronic Design (ISQED'06) ◽

10.1109/isqed.2006.68 ◽

2006 ◽

Cited By ~ 1

Author(s):

M.N. Velev

Keyword(s):

Formal Verification ◽

Pipelined Microprocessors

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pipelined microprocessors
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Machine learning for hardware security: Classifier-based identification of Trojans in pipelined microprocessors

Improving the efficiency of automated debugging of pipelined microprocessors by symmetry breaking in modular schemes for Boolean encoding of cardinality

A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors

Efficiently tolerating timing violations in pipelined microprocessors

Automated debugging of counterexamples in formal verification of pipelined microprocessors

Automatic formal verification of multithreaded pipelined microprocessors

Method for Formal Verification of Soft-Error Tolerance Mechanisms in Pipelined Microprocessors

Pipelined Microprocessors Optimization and Debugging

On-Line Instruction-Checking in Pipelined Microprocessors

Formal Verification of Pipelined Microprocessors with Delayed Branches

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pipelined microprocessorsRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Machine learning for hardware security: Classifier-based identification of Trojans in pipelined microprocessors

Improving the efficiency of automated debugging of pipelined microprocessors by symmetry breaking in modular schemes for Boolean encoding of cardinality

A functional test algorithm for the register forwarding and pipeline interlocking unit in pipelined microprocessors

Efficiently tolerating timing violations in pipelined microprocessors

Automated debugging of counterexamples in formal verification of pipelined microprocessors

Automatic formal verification of multithreaded pipelined microprocessors

Method for Formal Verification of Soft-Error Tolerance Mechanisms in Pipelined Microprocessors

Pipelined Microprocessors Optimization and Debugging

On-Line Instruction-Checking in Pipelined Microprocessors

Formal Verification of Pipelined Microprocessors with Delayed Branches

pipelined microprocessors
Recently Published Documents