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Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays

2018 ◽  
Vol 17 (2) ◽  
pp. 1-27 ◽  
Author(s):  
Alexandru Tanase ◽  
Michael Witterauf ◽  
Jürgen Teich ◽  
Frank Hannig
Keyword(s):  
Massively Parallel ◽  
Parallel Processor ◽  
Processor Arrays ◽  
Massively Parallel Processor ◽  
Multi Level

Techniques for on-demand structural redundancy for massively parallel processor arrays

2015 ◽  
Vol 61 (10) ◽  
pp. 615-627 ◽  
Author(s):  
Vahid Lari ◽  
Jürgen Teich ◽  
Alexandru Tanase ◽  
Michael Witterauf ◽  
Faramarz Khosravi ◽  
...  
Keyword(s):  
Massively Parallel ◽  
Parallel Processor ◽  
Structural Redundancy ◽  
On Demand ◽  
Processor Arrays ◽  
Massively Parallel Processor
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