Smart Production System Modeling: Bernoulli Serial Line Case

The manufacturing industry has entered the era of Industry 4.0/Smart Manufacturing. New technologies have dramatically changed the way manufacturing activities are carried out on the factory floor. In addition to an enhanced level of equipment automation, automation of decision-making has been one of the key objectives of these new initiatives. On the other hand, a critical issue that has been overlooked is the construction of mathematical models in manufacturing research and studies, which are typically done manually. This manual, ad-hoc nature of mathematical modeling is quite problematic when modeling the job flow in a manufacturing process. As a result, the quality of the models obtained may heavily depend on the experience and personal preference of the modeler. The goal of this paper is to develop a method to standardize and automate the modeling process using standard manufacturing key performance indices in the framework of Bernoulli serial production line model.

Implementation of ISLIP scheduler for NOC router on FPGA

Network on chip (NoC) effectively replaces a traditional bus based architecture in System on chip (SoC). The NoC provides a solution to the communication bottleneck of the bus based interconnection in SoC, where large numbers of Intellectual modules are integrated on a single chip for better performance. In NoC architecture, the router is a dominant component, which should provide contention free architecture with low latency. The router consists of input block, scheduler and crossbar switch. The design of scheduler leads the performance of the NoC router in terms of latency. Hence the starvation free scheduler is paramount importantin the NoC router design. iSLIP (Iterative serial line internet protocol) scheduler has programmable priority encoder which makes it fast and efficient scheduler over round robin arbiter. In this paper 2x4 NoC router using iSLIPscheduler is proposed. The proposed design is implemented using the Verilog programming on Xilinx Spartan 3 device.