Power-Aware Synchronization of a Software Defined Clock

In a distributed system, a common time reference allows each component to associate the same timestamp to events that occur simultaneously. It is a design option with benefits and drawbacks since it simplifies and makes more efficient a number of functions, but requires additional resources and control to keep component clocks synchronized. In this paper, we quantify how much power is spent to implement such a function, which helps to solve the dilemma in a system of low-power sensors. To find widely applicable results, the formal model used in our investigation is agnostic of the communication pattern that components use to synchronize their clocks, and focuses on the scheduling of clock synchronization operations needed to correct clock drift. This model helps us to discover that the dynamic calibration of clock drift significantly reduces power consumption. We derive an optimal algorithm to keep a software defined clock (SDCk) synchronized with the reference, and we find that its effectiveness is strongly influenced by hardware clock quality. To demonstrate the soundness of formal statements, we introduce a proof of concept. For its implementation, we privilege low-cost components and standard protocols, and we use it to find that the power needed to keep a clock within 200 ms from UTC (Universal Time Coordinate) as on the order of 10−5 W . The prototype is fully documented and reproducible.

The Research of IEEE 1588 Interface Module Based on LXI Instrument

LXI, which is generally recognized as the new generation of instrument bus technology, not only has developed rapidly in the field of test and measurement, but also has a vast potential for future development. At present, the LXI trigger requires the clock synchronization precision to reach a sub microsecond level or even higher one. Therefore, in order to meet this accuracy requirement, a scheme based on the embedded Linux and IEEE 1588 protocol is proposed in this paper on the basis of studying LXI so as to realize high accurate clock synchronization. This scheme acquires hardware timestamp by utilizing PHY chip DP83640 and realizes PTP hardware clock driving based on Linux. A synchronization test with Agilent B LXI trigger box under the current condition is conducted and about 100ns of synchronization precision can be reached when connected with cable directly. The result demonstrates the feasibility of the scheme and that the clock synchronization precision can reach a nanosecond level.