Proceedings VHDL International Users' Forum. Fall Conference
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0818681802

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

SCUBA: an HDL data-path/memory module generator for FPGAs

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623942 ◽

2002 ◽

Cited By ~ 1

Author(s):

S. Mohanty ◽

K. Maheswaran ◽

S. Haruyama ◽

Jiang Niu

Keyword(s):

Data Path ◽

Memory Module

Download Full-text

On comparing different modeling styles [VHDL]

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623959 ◽

2002 ◽

Author(s):

W. Ecker ◽

J. Bottger ◽

C. Ruschmeyer

Download Full-text

Building a test environment component in VHDL for an infrared link access protocol (IrLAP) compliant ASIC interface

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623953 ◽

2002 ◽

Author(s):

M.D. McKinney

Keyword(s):

Test Environment ◽

Access Protocol

Download Full-text

OOVHDL: object oriented VHDL

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623929 ◽

2002 ◽

Cited By ~ 2

Author(s):

B. Djafri ◽

J. Benzakki

Keyword(s):

Object Oriented

Download Full-text

Component modeling for reliability analysis by simulation

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623954 ◽

2002 ◽

Author(s):

B. Alizadeh ◽

Z. Navabi

Keyword(s):

Reliability Analysis

Download Full-text

A model-year architecture approach to hardware reuse in digital signal processor system design

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623955 ◽

2002 ◽

Cited By ~ 1

Author(s):

J. Wedgwood ◽

G. Buchanan

Keyword(s):

System Design ◽

Digital Signal Processor ◽

Digital Signal ◽

Model Year ◽

Signal Processor

Download Full-text

Functional fault simulation of VHDL gate level models

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623925 ◽

2002 ◽

Cited By ~ 2

Author(s):

S.A. Aftabjahani ◽

Z. Navabi

Keyword(s):

Fault Simulation

Download Full-text

Hardware/software codesign of a scalable embedded radar signal processor

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623951 ◽

2002 ◽

Cited By ~ 4

Author(s):

C. Buenzli ◽

L. Owen ◽

F. Rose

Keyword(s):

Radar Signal ◽

Signal Processor

Download Full-text

Implementing a complete test tool set in VHDL

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623923 ◽

2002 ◽

Author(s):

A. Peymandoust ◽

Z. Navabi

Keyword(s):

Test Tool ◽

Complete Test ◽

Tool Set

Download Full-text

VHDL-based performance modeling: an application of the PMW tool suite to an image classification system

Proceedings VHDL International Users' Forum. Fall Conference ◽

10.1109/viuf.1997.623952 ◽

2002 ◽

Author(s):

J. Ammon ◽

C. Hein

Keyword(s):

Image Classification ◽

Classification System ◽

Performance Modeling

Download Full-text

Proceedings VHDL International Users' Forum. Fall ConferenceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

SCUBA: an HDL data-path/memory module generator for FPGAs

On comparing different modeling styles [VHDL]

Building a test environment component in VHDL for an infrared link access protocol (IrLAP) compliant ASIC interface

OOVHDL: object oriented VHDL

Component modeling for reliability analysis by simulation

A model-year architecture approach to hardware reuse in digital signal processor system design

Functional fault simulation of VHDL gate level models

Hardware/software codesign of a scalable embedded radar signal processor

Implementing a complete test tool set in VHDL

VHDL-based performance modeling: an application of the PMW tool suite to an image classification system

Proceedings VHDL International Users' Forum. Fall Conference
Latest Publications