2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)
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31

(FIVE YEARS 31)

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9781665436540

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Design and Optimization of Cantilever Based RF-MEMS Shunt Switch for 5G Applications

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505131 ◽

2021 ◽

Author(s):

Heba Saleh ◽

Rayan Bajwa ◽

Ibrahim Tekin ◽

Murat Kaya Yapici

Keyword(s):

Rf Mems ◽

Design And Optimization

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Octantis: An Exploration Tool for Beyond von Neumann architectures

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505135 ◽

2021 ◽

Author(s):

Andrea Marchesin ◽

Giovanna Turvani ◽

Andrea Coluccio ◽

Fabrizio Riente ◽

Marco Vacca ◽

...

Keyword(s):

Von Neumann ◽

Exploration Tool

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Toward an Implementation Modeling Methodology for Designing SCA resilient Cryptographic Circuits

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505109 ◽

2021 ◽

Author(s):

Gabriel Rocherolle ◽

Roselyne Chotin

Keyword(s):

Modeling Methodology

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On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505096 ◽

2021 ◽

Author(s):

Pietro Inglese ◽

Elena Ioana Vatajelu ◽

Giorgio Di Natale

Keyword(s):

Boolean Operations

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DTIS 2021 Organizing Committee

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505050 ◽

2021 ◽

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Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505101 ◽

2021 ◽

Author(s):

L. Ammoura ◽

M. L. Flottes ◽

P. Girard ◽

A. Virazel

Keyword(s):

Defect Analysis

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Characterization of a RISC-V System-on-Chip under Neutron Radiation

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505054 ◽

2021 ◽

Author(s):

Douglas A. Santos ◽

Lucas M. Luza ◽

Maria Kastriotou ◽

Carlo Cazzaniga ◽

Cesar A. Zeferino ◽

...

Keyword(s):

Neutron Radiation ◽

System On Chip ◽

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Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505053 ◽

2021 ◽

Author(s):

Douglas Rossi Melo ◽

Cesar Albenes Zeferino ◽

Eduardo Augusto Bezerra ◽

Luigi Dilillo

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

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Memory Encryption Support for an FPGA-based RISC-V Implementation

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505064 ◽

2021 ◽

Author(s):

Alessandro Cilardo

Keyword(s):

Memory Encryption

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Optimization-based Test Scheduling for IEEE 1687 Multi-Power Domain Networks Using Boolean Satisfiability

2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) ◽

10.1109/dtis53253.2021.9505098 ◽

2021 ◽

Author(s):

Payam Habiby ◽

Sebastian Huhn ◽

Rolf Drechsler

Keyword(s):

Boolean Satisfiability ◽

Test Scheduling ◽

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