Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)
Latest Publications

TOTAL DOCUMENTS

103

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

078035012x

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

EDA Roadmap and Future VLSI Design Technology Enhancement

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.760037 ◽

2005 ◽

Author(s):

T. Hiwatashi

Keyword(s):

Vlsi Design ◽

Design Technology

Download Full-text

Optimal evaluation clocking of self-resetting domino pipelines

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759728 ◽

1999 ◽

Cited By ~ 4

Author(s):

K.Y. Yun ◽

A.E. Dooply

Keyword(s):

Optimal Evaluation

Download Full-text

A 10 b 58 MHz CMOS A/D converter for high-speed video applications

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759702 ◽

1999 ◽

Author(s):

Byeong-Lyeol Jeon ◽

Kang-Jin Lee ◽

Seung-Hoon Lee ◽

Sang-Won Yoon

Keyword(s):

High Speed ◽

High Speed Video

Download Full-text

Technology mapping for low power

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759981 ◽

1999 ◽

Author(s):

Chingwei Yeh ◽

Chin-Chao Chang ◽

Jinn-Shyan Wang

Keyword(s):

Low Power ◽

Technology Mapping

Download Full-text

An efficient approach to constrained via minimization for two-layer VLSI routing

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759982 ◽

1999 ◽

Cited By ~ 12

Author(s):

M. Tang ◽

K. Eshraghian ◽

Hon Nin Cheung

Keyword(s):

Efficient Approach

Download Full-text

Design and optimization of power/ground network for cell-based VLSIs with macro cells

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759700 ◽

1999 ◽

Author(s):

Xiaohai Wu ◽

Changge Qiao ◽

Xianlong Hong

Keyword(s):

Design And Optimization

Download Full-text

Balanced multi-level multi-way partitioning of large analog circuits for hierarchical symbolic analysis

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.759572 ◽

1999 ◽

Author(s):

Xiang-Dong Tan ◽

C.-J.R. Shi

Keyword(s):

Analog Circuits ◽

Symbolic Analysis ◽

Multi Level

Download Full-text

A timing-driven block placer based on sequence pair model

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.760007 ◽

1999 ◽

Cited By ~ 1

Author(s):

Gang Huang ◽

Xianlong Hong ◽

Changge Qiao ◽

Yici Cai

Keyword(s):

Sequence Pair ◽

Pair Model

Download Full-text

An on-chip automatic tuning circuit using integration level approximation technique

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.760010 ◽

1999 ◽

Author(s):

Lee Sung-Dae ◽

Jang Myung-Jun ◽

Lee Won-Hyo

Keyword(s):

Automatic Tuning ◽

Approximation Technique ◽

Tuning Circuit ◽

On Chip

Download Full-text

A method for evaluating upper bound of simultaneous switching gates using circuit partition

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) ◽

10.1109/aspdac.1999.760016 ◽

1999 ◽

Cited By ~ 4

Author(s):

K. Zhang ◽

T. Shinogi ◽

H. Takase ◽

T. Hayashi

Keyword(s):

Upper Bound ◽

Simultaneous Switching

Download Full-text

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

EDA Roadmap and Future VLSI Design Technology Enhancement

Optimal evaluation clocking of self-resetting domino pipelines

A 10 b 58 MHz CMOS A/D converter for high-speed video applications

Technology mapping for low power

An efficient approach to constrained via minimization for two-layer VLSI routing

Design and optimization of power/ground network for cell-based VLSIs with macro cells

Balanced multi-level multi-way partitioning of large analog circuits for hierarchical symbolic analysis

A timing-driven block placer based on sequence pair model

An on-chip automatic tuning circuit using integration level approximation technique

A method for evaluating upper bound of simultaneous switching gates using circuit partition

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)
Latest Publications