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16th International Conference on VLSI Design, 2003. Proceedings.
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99
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Published By IEEE
0769518680
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Personal and portable: the evolving definition
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183100
◽
2005
◽
Author(s):
G.A. Frantz
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India-building the tall, thin VLSI engineer
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183102
◽
2005
◽
Author(s):
R. Madhavan
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Advances in VLSI design and product development challenges
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183103
◽
2005
◽
Author(s):
A. Vasudevan
Keyword(s):
Product Development
◽
Vlsi Design
◽
Design And Product Development
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Living at the edge
16th International Conference on VLSI Design, 2003. Proceedings.
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10.1109/icvd.2003.1183101
◽
2005
◽
Author(s):
T. Vucurevich
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A game-theoretic approach for binding in behavioral synthesis
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183176
◽
2003
◽
Cited By ~ 6
Author(s):
A.K. Murugavel
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N. Ranganathan
Keyword(s):
Theoretic Approach
◽
Behavioral Synthesis
◽
Game Theoretic
◽
Game Theoretic Approach
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Energy efficient scheduling for datapath synthesis
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183175
◽
2003
◽
Cited By ~ 10
Author(s):
S.P. Mohanty
◽
N. Ranganathan
Keyword(s):
Energy Efficient
◽
Energy Efficient Scheduling
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Comparison of bistable circuits based on resonant-tunneling diodes
16th International Conference on VLSI Design, 2003. Proceedings.
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10.1109/icvd.2003.1183182
◽
2003
◽
Author(s):
A.F. Gonzalez
◽
P. Mazumder
Keyword(s):
Resonant Tunneling
◽
Resonant Tunneling Diodes
◽
Tunneling Diodes
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Low power technology mapping for LUT based FPGA - a genetic algorithm approach
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183118
◽
2003
◽
Cited By ~ 2
Author(s):
R. Pandey
◽
S. Chattopadhyay
Keyword(s):
Genetic Algorithm
◽
Low Power
◽
Technology Mapping
◽
Genetic Algorithm Approach
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Interfacing cores with on-chip packet-switched networks
16th International Conference on VLSI Design, 2003. Proceedings.
◽
10.1109/icvd.2003.1183166
◽
2003
◽
Cited By ~ 21
Author(s):
P. Bhojwani
◽
R. Mahapatra
Keyword(s):
Switched Networks
◽
On Chip
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Design of a high speed string matching co-processor for NLP
16th International Conference on VLSI Design, 2003. Proceedings.
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10.1109/icvd.2003.1183134
◽
2003
◽
Cited By ~ 2
Author(s):
V.S. Murty
◽
P.C. Reghu Raj
◽
S. Raman
Keyword(s):
High Speed
◽
String Matching
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