1993 European Conference on Design Automation with the European Event in ASIC Design
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103

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15

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Published By IEEE Computer Society Press

0818634103

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ML-Germinal: A new heuristic standard cell placement algorithm

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386479 ◽

2002 ◽

Author(s):

A. Dahmani ◽

Y. Savaria ◽

B. Kaminska

Keyword(s):

Standard Cell ◽

Cell Placement ◽

Placement Algorithm

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A high density datapath compiler mixing random logic with optimized blocks

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386477 ◽

2002 ◽

Author(s):

L.B. Ammar ◽

A. Greiner

Keyword(s):

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Efficiency improvement for slicing point placements

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386504 ◽

2002 ◽

Author(s):

P.E. Thio

Keyword(s):

Efficiency Improvement

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Heuristic techniques for the synthesis of complex functional units

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386417 ◽

2002 ◽

Author(s):

W. Geurts ◽

F. Catthoor ◽

H. De Man

Keyword(s):

Heuristic Techniques ◽

Functional Units

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Architectural-level fault simulation using symbolic data

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386436 ◽

2002 ◽

Author(s):

J. Lee ◽

E.M. Rudnick ◽

J.H. Patel

Keyword(s):

Fault Simulation ◽

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A novel interpolator architecture for ΣΔ DACs

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386468 ◽

2002 ◽

Author(s):

F. Francesconi ◽

G. Lazzari ◽

V. Liberali ◽

F. Maloberti ◽

G. Torelli

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Systolic VLSI implementations of a Galois field arithmetic algorithms

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386410 ◽

2002 ◽

Author(s):

M. Kovac ◽

N. Ranganathan

Keyword(s):

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Specification and verification of system-level hardware designs using time diagrams

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386409 ◽

2002 ◽

Author(s):

R. Schlor ◽

W. Damm

Keyword(s):

System Level ◽

Specification And Verification ◽

Hardware Designs

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Verifying equivalence of functions with unknown input correspondence

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386496 ◽

2002 ◽

Author(s):

D.I. Cheng ◽

M. Marek-Sadowska

Keyword(s):

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Relative location assignment for repetitive schedules

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386442 ◽

2002 ◽

Author(s):

J.L. van Meerbergen ◽

P.E.R. Lippens ◽

W.F.J. Verhaegh ◽

A. van der Werf

Keyword(s):

Relative Location ◽

Location Assignment

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