2007 IEEE/ACM International Conference on Computer-Aided Design
Latest Publications

TOTAL DOCUMENTS

153

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781424413812, 9781424413829

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Skew aware polarity assignment in clock tree

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397293 ◽

2007 ◽

Cited By ~ 2

Author(s):

Po-Yuan Chen ◽

Kuan-Hsien Ho ◽

TingTing Hwang

Keyword(s):

Clock Tree

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Cachecompress: a novel approach for test data compression with cache for IP embedded cores

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397315 ◽

2007 ◽

Author(s):

Hao Fang ◽

Chenguang Tong ◽

Bo Yao ◽

Xiaodi Song ◽

Xu Cheng

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Novel Approach ◽

Embedded Cores

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Practical method for obtaining a feasible integer solution in hierarchical layout optimization

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397250 ◽

2007 ◽

Author(s):

Xiaoping Tang ◽

Xin Yuan ◽

Michael S. Gray

Keyword(s):

Practical Method ◽

Layout Optimization ◽

Integer Solution

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A novel technique for incremental analysis of on-chip power distribution networks

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397366 ◽

2007 ◽

Author(s):

Yuhong Fu ◽

Rajendran Panda ◽

Ben Reschke ◽

Savithri Sundareswaran ◽

Min Zhao

Keyword(s):

Power Distribution ◽

Distribution Networks ◽

Incremental Analysis ◽

Power Distribution Networks ◽

Novel Technique ◽

On Chip

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Incremental component implementation selection: enabling ECO in compositional system synthesis

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397255 ◽

2007 ◽

Author(s):

Soheil Ghiasi

Keyword(s):

System Synthesis ◽

Compositional System

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Efficient multi-layer obstacle-avoiding rectilinear steiner tree construction

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397294 ◽

2007 ◽

Cited By ~ 3

Author(s):

Chung-Wei Lin ◽

Shih-Lun Huang ◽

Kai-Chi Hsu ◽

Meng-Xiang Li ◽

Yao-Wen Chang

Keyword(s):

Steiner Tree ◽

Obstacle Avoiding ◽

Tree Construction ◽

Rectilinear Steiner Tree

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Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397358 ◽

2007 ◽

Cited By ~ 7

Author(s):

M. Haykel Ben Jamaa ◽

David Atienza ◽

Giovanni De Micheli ◽

Kirsten E. Moselund ◽

Didier Bouvet ◽

...

Keyword(s):

Fault Tolerant ◽

Multi Level ◽

Memory Arrays

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A geometric approach for early power grid verification using current constraints

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397241 ◽

2007 ◽

Cited By ~ 5

Author(s):

Imad A. Ferzli ◽

Farid N. Najm ◽

Lars Kruse

Keyword(s):

Power Grid ◽

Geometric Approach

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Analog placement with common centroid constraints

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397327 ◽

2007 ◽

Cited By ~ 4

Author(s):

Qiang Ma ◽

Evangeline F. Y. Young ◽

K. P. Pun

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Principle Hessian Direction based parameter reduction with process variation

2007 IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.2007.4397336 ◽

2007 ◽

Cited By ~ 16

Author(s):

Alex Mitev ◽

Michael Marefat ◽

Dongsheng Ma ◽

Janet M. Wang

Keyword(s):

Process Variation ◽

Parameter Reduction

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2007 IEEE/ACM International Conference on Computer-Aided DesignLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Skew aware polarity assignment in clock tree

Cachecompress: a novel approach for test data compression with cache for IP embedded cores

Practical method for obtaining a feasible integer solution in hierarchical layout optimization

A novel technique for incremental analysis of on-chip power distribution networks

Incremental component implementation selection: enabling ECO in compositional system synthesis

Efficient multi-layer obstacle-avoiding rectilinear steiner tree construction

Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

A geometric approach for early power grid verification using current constraints

Analog placement with common centroid constraints

Principle Hessian Direction based parameter reduction with process variation

2007 IEEE/ACM International Conference on Computer-Aided Design
Latest Publications