Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)
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Structures with many-valued information and their relational proof theory

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848635 ◽

2002 ◽

Cited By ~ 2

Author(s):

I. Duntsch ◽

W. MacCaull ◽

E. Orlowska

Keyword(s):

Proof Theory

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The computing capacity of three-input multiple-valued one-threshold perceptrons

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848597 ◽

2002 ◽

Cited By ~ 1

Author(s):

A. Ngom ◽

I. Stojmenovic ◽

R. Tosic

Keyword(s):

Computing Capacity

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An efficient data transmission technique for VLSI systems based on multiple-valued code-division multiple access

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848654 ◽

2002 ◽

Cited By ~ 4

Author(s):

Y. Yuminaka ◽

O. Katoh ◽

Y. Sasaki ◽

T. Aoki ◽

T. Higuchi

Keyword(s):

Data Transmission ◽

Code Division Multiple Access ◽

Multiple Access ◽

Transmission Technique ◽

Efficient Data ◽

Code Division Multiple

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Some properties of discrete interval truth valued logic

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848606 ◽

2002 ◽

Cited By ~ 1

Author(s):

N. Takagi ◽

K. Nakashima

Keyword(s):

Discrete Interval

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Evolutionary multi-level network synthesis in given design style

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848628 ◽

2002 ◽

Cited By ~ 14

Author(s):

T. Luba ◽

C. Moraga ◽

S. Yanushkevich ◽

M. Opoka ◽

V. Shmerko

Keyword(s):

Network Synthesis ◽

Multi Level ◽

Design Style

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A method for approximate equivalence checking

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848656 ◽

2002 ◽

Cited By ~ 1

Author(s):

M. Thornton ◽

R. Drechsler ◽

W. Gunther

Keyword(s):

Equivalence Checking

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A study on the ternary parallel circuit design with DCG properties based on the matrix equation

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848637 ◽

2002 ◽

Author(s):

Gi-Noung Byun ◽

Chol-U Lee ◽

Seung-Yong Park ◽

Heung-Soo Kim

Keyword(s):

Circuit Design ◽

Matrix Equation ◽

The Matrix ◽

Parallel Circuit

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Cost-analysis of 4-valued unary functions implemented using current-mode CMOS circuits

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848622 ◽

2002 ◽

Cited By ~ 4

Author(s):

M. Abd-El-Barr ◽

A. Al-Mutawa

Keyword(s):

Cost Analysis ◽

Current Mode ◽

Cmos Circuits

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On algebraic foundations of information granulation III. Investigating the HATA-MUKAIDONO approach

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848611 ◽

2002 ◽

Cited By ~ 2

Author(s):

H. Thiele

Keyword(s):

Information Granulation

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Fuzzy decision diagrams for the representation, analysis and optimization of rule bases

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000) ◽

10.1109/ismvl.2000.848610 ◽

2002 ◽

Cited By ~ 7

Author(s):

K. Strehl ◽

C. Moraga ◽

K.-H. Temme ◽

R.S. Stankovic

Keyword(s):

Decision Diagrams ◽

Fuzzy Decision ◽

Rule Bases

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Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Structures with many-valued information and their relational proof theory

The computing capacity of three-input multiple-valued one-threshold perceptrons

An efficient data transmission technique for VLSI systems based on multiple-valued code-division multiple access

Some properties of discrete interval truth valued logic

Evolutionary multi-level network synthesis in given design style

A method for approximate equivalence checking

A study on the ternary parallel circuit design with DCG properties based on the matrix equation

Cost-analysis of 4-valued unary functions implemented using current-mode CMOS circuits

On algebraic foundations of information granulation III. Investigating the HATA-MUKAIDONO approach

Fuzzy decision diagrams for the representation, analysis and optimization of rule bases

Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)
Latest Publications