ESSCIRC '92: Eighteenth European Solid-State Circuits conference
Latest Publications

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87

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4

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Published By IEEE

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A Neuron- and a Synapse Chip for Artificial Neural Networks

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468235 ◽

1992 ◽

Author(s):

John A. Lansner ◽

Torsten Lehmann

Keyword(s):

Neural Networks ◽

Artificial Neural Networks ◽

Artificial Neural

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Proceedings Table of Contents

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468476 ◽

1992 ◽

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Area and Timing Optimisation of high performant datapaths with CHOPIN-2

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468189 ◽

1992 ◽

Author(s):

L. Rijnders ◽

Z. Sahraoui ◽

P. Six ◽

H. De Man

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Foreword

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468106 ◽

1992 ◽

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Design of a Second Order CMOS Sigma-Delta A/D Converter with a 150 MHz Clock Rate

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468421 ◽

1992 ◽

Author(s):

B. Hallgren

Keyword(s):

Second Order ◽

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Accuracy Optimization of Analog Fuzzy Circuitry in Network Analysis Environment

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468196 ◽

1992 ◽

Author(s):

J. Oehm ◽

K. Schumacher

Keyword(s):

Network Analysis ◽

Analysis Environment

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An Analog CMOS Multiplier Based on the Tomota-Sugiyama-Yamaguchi Principle

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468147 ◽

1992 ◽

Author(s):

B. A. De Cock ◽

D. Maurissens ◽

J. Cornelis

Keyword(s):

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Technology independent VLSI-Design using Bit Level self-timed circuits

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468165 ◽

1992 ◽

Author(s):

C. Heer ◽

O. Aumann

Keyword(s):

Vlsi Design ◽

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Eighteenth European Solid State Circuits Conference

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468117 ◽

1992 ◽

Keyword(s):

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Optimized Design For Test Techniques Applied to Embedded Mixed Mode Macros

ESSCIRC '92: Eighteenth European Solid-State Circuits conference ◽

10.1109/esscirc.1992.5468406 ◽

1992 ◽

Author(s):

S. Allott ◽

J. Raczkowycz

Keyword(s):

Design For Test ◽

Optimized Design

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