2020 20th International Symposium on Computer Architecture and Digital Systems (CADS)
Latest Publications

TOTAL DOCUMENTS

13

(FIVE YEARS 13)

H-INDEX

0

(FIVE YEARS 0)

Published By IEEE

9781728181110

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Lightweight and DPA-Resistant Post-Quantum Cryptoprocessor based on Binary Ring-LWE

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211858 ◽

2020 ◽

Author(s):

Shahriar Ebrahimi ◽

Siavash Bayat-Sarmadi

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The IEEE 754-2019 Compatibility of the Binary Coded Chiliad (BCC) Encoding

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211861 ◽

2020 ◽

Author(s):

Morteza Dorrigiv

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Real Vulnerabilities in Partial Reconfigurable Design Cycles; Case Study for Implementation of Hardware Security Modules

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211860 ◽

2020 ◽

Author(s):

Hanieh Jafarzadeh ◽

Ali Jahanian

Keyword(s):

Hardware Security ◽

Reconfigurable Design ◽

Hardware Security Modules

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CMOS Arbiter Physical Unclonable Function with Selecting Modules

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211853 ◽

2020 ◽

Author(s):

Mona Moradi ◽

Reza Faghih Mirzaee ◽

Sha Tao

Keyword(s):

Physical Unclonable Function

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Power-efficient, high-PSNR approximate full adder applied in error-resilient computations based on CNTFETs

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211854 ◽

2020 ◽

Author(s):

Seyed Erfan Fatemieh ◽

Mohammad Reza Reshadinezhad

Keyword(s):

Error Resilient ◽

Power Efficient

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Protecting the FPGA IPs against Higher-order Side Channel Attacks using Dynamic Partial Reconfiguration

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211862 ◽

2020 ◽

Author(s):

Ario Kian ◽

Hamed Hosseintalaee ◽

Ali Jahanian

Keyword(s):

Higher Order ◽

Side Channel ◽

Partial Reconfiguration ◽

Side Channel Attacks ◽

Dynamic Partial Reconfiguration

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A GPU-Enabled Extension for Apache Ignite to Facilitate Running Genetic Algorithms

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211857 ◽

2020 ◽

Author(s):

Majid Salimi Beni ◽

Amir Hossein Sojoodi ◽

Farshad Khunjush

Keyword(s):

Genetic Algorithms

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A Custom Hardware CCA Engine for Real-time SSVEP-based BCI Applications

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211863 ◽

2020 ◽

Author(s):

Reza Karkon ◽

Seyed Mohammad Reza Shahshahani ◽

Hamid Reza Mahdiani

Keyword(s):

Real Time ◽

Custom Hardware

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A Scalable QCA Clocking Mechanism for Efficient Full Utilization of Majority Gates

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211859 ◽

2020 ◽

Author(s):

Milad Sangsefidi ◽

Dariush Abedi

Keyword(s):

Full Utilization

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Keynote Speakers

2020 20th International Symposium on Computer Architecture and Digital Systems (CADS) ◽

10.1109/cads50570.2020.9211852 ◽

2020 ◽

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