Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537)
Latest Publications

TOTAL DOCUMENTS

147

(FIVE YEARS 0)

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Published By IEEE Comput. Soc

0769505376

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

From high-level specifications down to software implementations of parallel embedded real-time systems

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840861 ◽

2002 ◽

Author(s):

C. Rust ◽

F. Stappert ◽

P. Altenbernd ◽

J. Tacken

Keyword(s):

Real Time ◽

Real Time Systems ◽

Software Implementations ◽

High Level ◽

Time Systems

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Assessing the cost effectiveness of integrated passives

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840838 ◽

2002 ◽

Cited By ~ 2

Author(s):

M. Scheffler ◽

G. Troster

Keyword(s):

Cost Effectiveness ◽

Integrated Passives ◽

The Cost

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Parametric fault simulation and test vector generation

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840855 ◽

2002 ◽

Cited By ~ 21

Author(s):

K. Saab ◽

N. Ben-Hamida ◽

B. Kaminska

Keyword(s):

Fault Simulation ◽

Test Vector ◽

Vector Generation ◽

Parametric Fault ◽

Test Vector Generation

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Free MDD-based software optimization techniques for embedded systems

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840009 ◽

2002 ◽

Author(s):

Changhee Kim ◽

L. Lavagno ◽

A. Sangiovanni-Vincentelli

Keyword(s):

Embedded Systems ◽

Optimization Techniques ◽

Software Optimization

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Resolution of dynamic memory allocation and pointers for the behavioral synthesis from C

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840289 ◽

2002 ◽

Cited By ~ 6

Author(s):

L. Semeria ◽

K. Sato ◽

G. De Micheli

Keyword(s):

Memory Allocation ◽

Dynamic Memory ◽

Behavioral Synthesis ◽

Dynamic Memory Allocation

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A new approach for computation of timing jitter in phase locked loops

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840294 ◽

2002 ◽

Author(s):

M.M. Gourary ◽

S.G. Rusakov ◽

S.L. Ulyanov ◽

M.M. Zharov ◽

K.K. Gullapalli ◽

...

Keyword(s):

Timing Jitter ◽

Phase Locked Loops ◽

New Approach

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Efficient method of failure detection in iterative array multiplier

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840897 ◽

2002 ◽

Cited By ~ 4

Author(s):

A. Drozd

Keyword(s):

Efficient Method ◽

Failure Detection ◽

Array Multiplier

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Constructive library-aware synthesis using symmetries

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840040 ◽

2002 ◽

Cited By ~ 12

Author(s):

V.N. Kravet ◽

K.A. Sakallah

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Abstraction from counters: an application on real-time systems

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840829 ◽

2002 ◽

Author(s):

G. Logothetis ◽

K. Schneider

Keyword(s):

Real Time ◽

Real Time Systems ◽

Time Systems

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Wire-sizing for delay minimization and ringing control using transmission line model

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840833 ◽

2002 ◽

Cited By ~ 2

Author(s):

Youxin Gao ◽

D.F. Wong

Keyword(s):

Transmission Line ◽

Transmission Line Model ◽

Line Model ◽

Delay Minimization ◽

Wire Sizing

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Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

From high-level specifications down to software implementations of parallel embedded real-time systems

Assessing the cost effectiveness of integrated passives

Parametric fault simulation and test vector generation

Free MDD-based software optimization techniques for embedded systems

Resolution of dynamic memory allocation and pointers for the behavioral synthesis from C

A new approach for computation of timing jitter in phase locked loops

Efficient method of failure detection in iterative array multiplier

Constructive library-aware synthesis using symmetries

Abstraction from counters: an application on real-time systems

Wire-sizing for delay minimization and ringing control using transmission line model

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537)
Latest Publications