test vector generation
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Automation of Translating Unit-Level Verification Scenarios for Test Vector Generation of SoC

Intelligent Sustainable Systems - Lecture Notes in Networks and Systems ◽

10.1007/978-981-16-6309-3_50 ◽

2022 ◽

pp. 527-536

Author(s):

Rahul Anilkumar ◽

B. K. S. V. L. Varaprasad ◽

K. Padmapriya

Keyword(s):

Test Vector ◽

Vector Generation ◽

Test Vector Generation

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Test vector generation for high-speed digital integrated circuits

2021 IEEE 4th Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC) ◽

10.1109/imcec51613.2021.9481998 ◽

2021 ◽

Author(s):

Wanyu Yang ◽

Jiacheng Hui ◽

Kun Yin ◽

Zhijian Dai ◽

Kaihua Deng

Keyword(s):

Integrated Circuits ◽

Test Vector ◽

Digital Integrated Circuits ◽

Vector Generation ◽

Test Vector Generation

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A Novel Test Vector Generation Method for Hardware Trojan Detection

2019 32nd IEEE International System-on-Chip Conference (SOCC) ◽

10.1109/socc46988.2019.1570548271 ◽

2019 ◽

Author(s):

Anindan Mondal ◽

Mahabub Hasan Mahalat ◽

Suraj Mandal ◽

Suchismita Roy ◽

Bibhash Sen

Keyword(s):

Hardware Trojan ◽

Test Vector ◽

Hardware Trojan Detection ◽

Trojan Detection ◽

Vector Generation ◽

Test Vector Generation

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A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2018.2882876 ◽

2019 ◽

Vol 66 (6) ◽

pp. 2198-2207

Author(s):

Javier Valls ◽

Vicente Torres ◽

Maria Jose Canet ◽

Francisco M. Garcia-Herrero

Keyword(s):

Low Complexity ◽

Test Vector ◽

Soft Decision ◽

Vector Generation ◽

Error Probabilities ◽

Test Vector Generation

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Input Bridging Fault and Non Feedback Bridging Fault Detection and Test Vector Generation by Boolean Satisfiability Method

International Journal of Engineering & Technology ◽

10.14419/ijet.v7i3.12.16105 ◽

2018 ◽

Vol 7 (3.12) ◽

pp. 354

Author(s):

K Sarvani ◽

B Viswanathan

Keyword(s):

Fault Detection ◽

Boolean Satisfiability ◽

Test Vector ◽

Combinational Circuits ◽

Bridging Faults ◽

Quality Test ◽

High Quality ◽

Vector Generation ◽

Bridging Fault ◽

Test Vector Generation

The input bridging faults and non feedback bridging fault( short between lines) occurs due to improper soldering.This paper enumerates the Fault detection and high quality test vector generation for these faults by using Boolean Satisfiability method with the help of JAVA code.This method can be adapted to deal with many faults in the combinational circuits.

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Low cost automatic test vector generation for structural analog testing

2017 18th IEEE Latin American Test Symposium (LATS) ◽

10.1109/latw.2017.7906740 ◽

2017 ◽

Author(s):

Andre L. Chinazzo ◽

Paulo C. Comassetto de Aguirre ◽

Tiago R. Balen

Keyword(s):

Low Cost ◽

Structural Analog ◽

Test Vector ◽

Automatic Test ◽

Analog Testing ◽

Vector Generation ◽

Test Vector Generation

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Fault Modeling and Worst-Case Test Vector Generation for Flash-Based FPGA’s Exposed to Total Dose

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2017.2687982 ◽

2017 ◽

pp. 1-1 ◽

Author(s):

Ahmed Abou-Auf ◽

Mostafa Abdel-Azizz ◽

Mai Abdel-Azizz ◽

Adel Amer

Keyword(s):

Fault Modeling ◽

Test Vector ◽

Vector Generation ◽

Test Vector Generation

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Test vector Generation using different logic regression method

2016 2nd International Conference on Applied and Theoretical Computing and Communication Technology (iCATccT) ◽

10.1109/icatcct.2016.7912097 ◽

2016 ◽

Author(s):

Shashidhara H. R.

Keyword(s):

Regression Method ◽

Test Vector ◽

Logic Regression ◽

Vector Generation ◽

Test Vector Generation

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SimAutoGen Tool: Test Vector Generation from Large Scale MATLAB/Simulink Models

Formal Techniques for Distributed Objects, Components, and Systems - Lecture Notes in Computer Science ◽

10.1007/978-3-319-39570-8_18 ◽

2016 ◽

pp. 267-274

Author(s):

Manel Tekaya ◽

Mohamed Taha Bennani ◽

Nedra Ebdelli ◽

Samir Ben Ahmed

Keyword(s):

Large Scale ◽

Test Vector ◽

Matlab Simulink ◽

Vector Generation ◽

Test Vector Generation

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Binary floating point verification using random test vector generation based on SV constraints

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) ◽

10.1109/icecs.2015.7440341 ◽

2015 ◽

Author(s):

Khaled Nouh ◽

Hossam A. H. Fahmy

Keyword(s):

Floating Point ◽

Test Vector ◽

Random Test ◽

Vector Generation ◽

Test Vector Generation

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