Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV
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Published By Springer Berlin Heidelberg

9783642245671, 9783642245688

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A Systematic Design Space Exploration Approach to Customising Multi-Processor Architectures: Exemplified Using Graphics Processors

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_4 ◽

2011 ◽

pp. 63-83

Author(s):

Ben Cope ◽

Peter Y. K. Cheung ◽

Wayne Luk ◽

Lee Howes

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Systematic Design ◽

Graphics Processors ◽

Processor Architectures

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Compiler Directed Issue Queue Energy Reduction

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_3 ◽

2011 ◽

pp. 42-62 ◽

Cited By ~ 1

Author(s):

Timothy M. Jones ◽

Michael F. P. O’Boyle ◽

Jaume Abella ◽

Antonio González

Keyword(s):

Energy Reduction

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Transaction Reordering to Reduce Aborts in Software Transactional Memory

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_10 ◽

2011 ◽

pp. 195-214

Author(s):

Mohammad Ansari ◽

Mikel Luján ◽

Christos Kotselidis ◽

Kim Jarvis ◽

Chris Kirkham ◽

...

Keyword(s):

Transactional Memory ◽

Software Transactional Memory

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A Cost Model for Partial Dynamic Reconfiguration

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_19 ◽

2011 ◽

pp. 370-390 ◽

Cited By ~ 2

Author(s):

Markus Rullmann ◽

Renate Merker

Keyword(s):

Cost Model ◽

Dynamic Reconfiguration ◽

Partial Dynamic Reconfiguration

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A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_1 ◽

2011 ◽

pp. 1-20 ◽

Cited By ~ 7

Author(s):

Magnus Jahre ◽

Lasse Natvig

Keyword(s):

High Performance ◽

Chip Multiprocessors

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Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_9 ◽

2011 ◽

pp. 175-194

Author(s):

Michael B. Henry ◽

Leyla Nazhandali

Keyword(s):

Low Power ◽

Subthreshold Design

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Finding Extreme Behaviors in Microprocessor Workloads

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_8 ◽

2011 ◽

pp. 155-174

Author(s):

Frederik Vandeputte ◽

Lieven Eeckhout

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Characterizing Time-Varying Program Behavior Using Phase Complexity Surfaces

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_2 ◽

2011 ◽

pp. 21-41

Author(s):

Frederik Vandeputte ◽

Lieven Eeckhout

Keyword(s):

Time Varying ◽

Program Behavior

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Advanced Packet Segmentation and Buffering Algorithms in Network Processors

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_17 ◽

2011 ◽

pp. 334-353

Author(s):

Daniel Llorente ◽

Kimon Karras ◽

Thomas Wild ◽

Andreas Herkersdorf

Keyword(s):

Network Processors

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Signature-Based Calibration of Analytical Performance Models for System-Level Design Space Exploration

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV ◽

10.1007/978-3-642-24568-8_21 ◽

2011 ◽

pp. 409-425 ◽

Cited By ~ 1

Author(s):

Stanley Jaddoe ◽

Mark Thompson ◽

Andy D. Pimentel

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Analytical Performance ◽

System Level ◽

System Level Design ◽

Performance Models ◽

Level Design

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Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IVLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

A Systematic Design Space Exploration Approach to Customising Multi-Processor Architectures: Exemplified Using Graphics Processors

Compiler Directed Issue Queue Energy Reduction

Transaction Reordering to Reduce Aborts in Software Transactional Memory

A Cost Model for Partial Dynamic Reconfiguration

A High Performance Adaptive Miss Handling Architecture for Chip Multiprocessors

Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture

Finding Extreme Behaviors in Microprocessor Workloads

Characterizing Time-Varying Program Behavior Using Phase Complexity Surfaces

Advanced Packet Segmentation and Buffering Algorithms in Network Processors

Signature-Based Calibration of Analytical Performance Models for System-Level Design Space Exploration

Lecture Notes in Computer Science - Transactions on High-Performance Embedded Architectures and Compilers IV
Latest Publications