Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97
Latest Publications

TOTAL DOCUMENTS

107

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Published By IEEE

081868206x

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Parallel-array implementations of a non-restoring square root algorithm

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628940 ◽

2002 ◽

Cited By ~ 4

Author(s):

Yamin Li ◽

Wanming Chu

Keyword(s):

Square Root ◽

Parallel Array

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Formal implementation verification of the bus interface unit for the Alpha 21264 microprocessor

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628844 ◽

2002 ◽

Cited By ~ 6

Author(s):

G.P. Bischoff ◽

K.S. Brace ◽

S. Jain ◽

R. Razdan

Keyword(s):

Interface Unit

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Instruction prefetching using branch prediction information

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628926 ◽

2002 ◽

Cited By ~ 3

Author(s):

I-Cheng K. Chen ◽

Chih-Chieh Lee ◽

T.N. Mudge

Keyword(s):

Branch Prediction ◽

Instruction Prefetching

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Novel simulation of deep-submicron MOSFET circuits

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628850 ◽

2002 ◽

Cited By ~ 1

Author(s):

S. Bruma ◽

R.H.J.M. Otten

Keyword(s):

Deep Submicron

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A new approach for initialization sequences computation for synchronous sequential circuits

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628898 ◽

2002 ◽

Cited By ~ 3

Author(s):

F. Corno ◽

P. Prinetto ◽

M. Rebaudengo ◽

M. Sonza Reorda ◽

G. Squillero

Keyword(s):

Sequential Circuits ◽

New Approach ◽

Synchronous Sequential Circuits

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Design and performance evaluation of a cache assist to implement selective caching

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628916 ◽

2002 ◽

Cited By ~ 10

Author(s):

L.K. John ◽

A. Subramanian

Keyword(s):

Performance Evaluation ◽

And Performance

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Formally specifying and mechanically verifying programs for the Motorola complex arithmetic processor DSP

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628846 ◽

2002 ◽

Cited By ~ 3

Author(s):

C. Brock ◽

W.A. Hunt

Keyword(s):

Complex Arithmetic ◽

Arithmetic Processor

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Nonenumerative path delay fault coverage estimation with optimal algorithms

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628896 ◽

2002 ◽

Cited By ~ 1

Author(s):

D. Kagaris ◽

S. Tragoudas ◽

D. Karayiannis

Keyword(s):

Fault Coverage ◽

Optimal Algorithms ◽

Path Delay ◽

Delay Fault ◽

Path Delay Fault ◽

Coverage Estimation ◽

Fault Coverage Estimation

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Vector restoration based static compaction of test sequences for synchronous sequential circuits

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628895 ◽

2002 ◽

Cited By ~ 86

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Sequential Circuits ◽

Synchronous Sequential Circuits ◽

Static Compaction

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A high-frequency custom CMOS S/390 microprocessor

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97 ◽

10.1109/iccd.1997.628874 ◽

2002 ◽

Cited By ~ 2

Author(s):

C.F. Webb ◽

J.S. Liptay

Keyword(s):

High Frequency

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Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Parallel-array implementations of a non-restoring square root algorithm

Formal implementation verification of the bus interface unit for the Alpha 21264 microprocessor

Instruction prefetching using branch prediction information

Novel simulation of deep-submicron MOSFET circuits

A new approach for initialization sequences computation for synchronous sequential circuits

Design and performance evaluation of a cache assist to implement selective caching

Formally specifying and mechanically verifying programs for the Motorola complex arithmetic processor DSP

Nonenumerative path delay fault coverage estimation with optimal algorithms

Vector restoration based static compaction of test sequences for synchronous sequential circuits

A high-frequency custom CMOS S/390 microprocessor

Proceedings International Conference on Computer Design VLSI in Computers and Processors ICCD-97
Latest Publications